Ð þíŒ$8…T(Ð…)Qualcomm Technologies, Inc. MSM 8916 MTP:qcom,msm8916-mtpqcom,msm8916-mtp/1qcom,msm8916qcom,mtp"1aliases=/soc/sdhci@7824000C/soc/sdhci@7864000I/soc/serial@78b0000Q/soc/spmi@200f000/pm8916@0chosenWserial0memorycmemoryoreserved-memory"1stz-apps@86000000o†0zsmem_region@86300000o†0z hypervisor@86400000o†@ztz@86500000o†Pzreserved@86680000o†hzrmtfs@86700000qcom,rmtfs-memo†pz‰rfsa@867e0000o†~zmpss@86800000o†€°z=wcnss@89300000o‰0`z>venus@89900000o‰`z\mba@8ea00000zoŽ <cpus"1cpu@0ccpuarm,cortex-a53arm,armv8o˜©psci·ÇÎâcpu@1ccpuarm,cortex-a53arm,armv8o˜©psci·ÇÎâUcpu@2ccpuarm,cortex-a53arm,armv8o˜©psci·ÇÎâVcpu@3ccpuarm,cortex-a53arm,armv8o˜©psci·ÇÎâWl2-cachecacheñidle-statesspcarm,idle-stateý@‚%–5ÐFpsci arm,psci-1.0°smcpmuarm,cortex-a53-pmu Wthermal-zonescpu-thermal0búxè†tripstrip0–$ø¢Ðjpassivetrip1–­°¢Ð jcriticalcooling-mapsmap0­ ²ÿÿÿÿÿÿÿÿcpu-thermal1búxè†tripstrip0–$ø¢Ðjpassive trip1–­°¢Ð jcriticalcooling-mapsmap0­  ²ÿÿÿÿÿÿÿÿcpu_opp_tableoperating-points-v2Áopp-200000000Ì ëÂopp-400000000Ìׄopp-800000000Ì/¯opp-998400000Ì;‚`opp_tableoperating-points-v2/opp-400000000Ìׄopp-19200000Ì$øtimerarm,armv8-timer0Wclocksxo_board fixed-clockÓà$ø&sleep_clk fixed-clockÓà€smem qcom,smemð þ  firmwarescm qcom,scmÇ h g fcorebusiface#0a8soc"1sÿÿÿÿ simple-busrestart@4ab000 qcom,psholdoJ°pinctrl@1000000qcom,msm8916-pinctrlo0 WÐ@P\qblsp1_uart1_defaultpinmux ‚blsp_uart1‹gpio0gpio1gpio2gpio3pinconf‹gpio0gpio1gpio2gpio3Ÿblsp1_uart1_sleeppinmux‚gpio‹gpio0gpio1gpio2gpio3pinconf‹gpio0gpio1gpio2gpio3¬blsp1_uart2_defaultpinmux ‚blsp_uart2 ‹gpio4gpio5pinconf ‹gpio4gpio5Ÿblsp1_uart2_sleeppinmux‚gpio ‹gpio4gpio5pinconf ‹gpio4gpio5¬spi1_defaultpinmux ‚blsp_spi1‹gpio0gpio1gpio3pinmux_cs‚gpio‹gpio2pinconf‹gpio0gpio1gpio3 Ÿpinconf_cs‹gpio2Ÿ»spi1_sleeppinmux‚gpio‹gpio0gpio1gpio2gpio3pinconf‹gpio0gpio1gpio2gpio3¬spi2_defaultpinmux ‚blsp_spi2‹gpio4gpio5gpio7pinmux_cs‚gpio‹gpio6pinconf‹gpio4gpio5gpio7 Ÿpinconf_cs‹gpio6Ÿ»spi2_sleeppinmux‚gpio‹gpio4gpio5gpio6gpio7pinconf‹gpio4gpio5gpio6gpio7¬spi3_defaultpinmux ‚blsp_spi3‹gpio8gpio9gpio11pinmux_cs‚gpio‹gpio10pinconf‹gpio8gpio9gpio11 Ÿpinconf_cs‹gpio10Ÿ»spi3_sleeppinmux‚gpio‹gpio8gpio9gpio10gpio11pinconf‹gpio8gpio9gpio10gpio11¬spi4_defaultpinmux ‚blsp_spi4‹gpio12gpio13gpio15pinmux_cs‚gpio‹gpio14pinconf‹gpio12gpio13gpio15 Ÿpinconf_cs‹gpio14Ÿ»spi4_sleeppinmux‚gpio‹gpio12gpio13gpio14gpio15pinconf‹gpio12gpio13gpio14gpio15¬spi5_defaultpinmux ‚blsp_spi5‹gpio16gpio17gpio19pinmux_cs‚gpio‹gpio18pinconf‹gpio16gpio17gpio19 Ÿpinconf_cs‹gpio18Ÿ»spi5_sleeppinmux‚gpio‹gpio16gpio17gpio18gpio19pinconf‹gpio16gpio17gpio18gpio19¬spi6_defaultpinmux ‚blsp_spi6‹gpio20gpio21gpio23pinmux_cs‚gpio‹gpio22pinconf‹gpio20gpio21gpio23 Ÿpinconf_cs‹gpio22Ÿ»spi6_sleeppinmux‚gpio‹gpio20gpio21gpio22gpio23pinconf‹gpio20gpio21gpio22gpio23¬i2c2_default pinmux ‚blsp_i2c2 ‹gpio6gpio7pinconf ‹gpio6gpio7Ÿi2c2_sleep!pinmux‚gpio ‹gpio6gpio7pinconf ‹gpio6gpio7Ÿi2c4_default"pinmux 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‚cdc_pdm0*‹gpio63gpio64gpio65gpio66gpio67gpio68pinconf*‹gpio63gpio64gpio65gpio66gpio67gpio68Ÿpdm_lines_offpinmux ‚cdc_pdm0*‹gpio63gpio64gpio65gpio66gpio67gpio68pinconf*‹gpio63gpio64gpio65gpio66gpio67gpio68¬ext-pri-tlmm-linesext_pa_onpinmux ‚pri_mi2s ‹gpio113gpio114gpio115gpio116pinconf ‹gpio113gpio114gpio115gpio116Ÿext_pa_offpinmux ‚pri_mi2s ‹gpio113gpio114gpio115gpio116pinconf ‹gpio113gpio114gpio115gpio116Ÿext-pri-ws-lineext_pa_onpinmux ‚pri_mi2s_ws‹gpio110pinconf‹gpio110Ÿext_pa_offpinmux ‚pri_mi2s_ws‹gpio110pinconf‹gpio110Ÿext-mclk-tlmm-linesmclk_lines_onpinmux ‚pri_mi2s‹gpio116pinconf‹gpio116Ÿmclk_lines_offpinmux ‚pri_mi2s‹gpio116pinconf‹gpio116Ÿext-sec-tlmm-linestlmm_lines_onpinmux ‚sec_mi2s ‹gpio112gpio117gpio118gpio119pinconf ‹gpio112gpio117gpio118gpio119Ÿtlmm_lines_offpinmux ‚sec_mi2s ‹gpio112gpio117gpio118gpio119pinconf ‹gpio112gpio117gpio118gpio119Ÿcdc-dmic-linesdmic_lines_onpinmux_dmic0_clk ‚dmic0_clk‹gpio0pinmux_dmic0_data ‚dmic0_data‹gpio1pinconf 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modelcompatibleinterrupt-parent#address-cells#size-cellssdhc1sdhc2serial0usid0stdout-pathdevice_typeregrangesno-mapphandleqcom,client-idnext-level-cacheenable-methodcpu-idle-statesclocksoperating-points-v2#cooling-cellscache-levelarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceopp-sharedopp-hz#clock-cellsclock-frequencymemory-regionqcom,rpm-msg-ramhwlocksclock-names#reset-cellsqcom,dload-modegpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsfunctionpinsdrive-strengthbias-disablebias-pull-downoutput-highbias-pull-up#power-domain-cellssyscon#hwlock-cellsdmasdma-namesstatus#mbox-cellspinctrl-namespinctrl-0pinctrl-1#dma-cellsqcom,ee#sound-dai-cellsinterrupt-namesreg-namesmmc-ddr-1_8vbus-widthnon-removableassigned-clocksassigned-clock-ratesresetsreset-namesphy_typedr_modeahb-burst-configphy-namesphys#phy-cellsqcom,init-seqframe-numberqcom,channeldebounceio-channelsio-channel-names#thermal-sensor-cells#io-channel-cellsqcom,pre-scalingvdd-cdc-io-supplyvdd-cdc-tx-rx-cx-supplyvdd-micbias-supplynvmem-cellsnvmem-cell-names#iommu-cellsqcom,iommu-secure-idpower-domainsiommusremote-endpointassigned-clock-parentsinterrupts-extendedqcom,smem-statesqcom,smem-state-namesmx-supplypll-supplyqcom,halt-regsqcom,smd-edgeqcom,ipcqcom,remote-pidlabelvddmx-supplyvddpx-supplyqcom,stateqcom,state-namesvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioslave-modecpuqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsqcom,ipc-1qcom,ipc-3