8`( ('tsd,rk3399-puma-haikourockchip,rk3399 + 7Theobroma Systems RK3399-Q7 SoMaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/dwmmc@fe310000y/dwmmc@fe320000~/sdhci@fe330000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53arm,armv8pscid  cpu@1cpuarm,cortex-a53arm,armv8pscid  cpu@2cpuarm,cortex-a53arm,armv8pscid  cpu@3cpuarm,cortex-a53arm,armv8pscid  cpu@100cpuarm,cortex-a72arm,armv8psci   cpu@101cpuarm,cortex-a72arm,armv8psci   display-subsystemrockchip,display-subsystem$ pmu_a53arm,cortex-a53-pmu*pmu_a72arm,cortex-a72-pmu*psci arm,psci-1.0smctimerarm,armv8-timer@*   5xin24m fixed-clockLn6\xin24moamba simple-bus+|dma-controller@ff6d0000arm,pl330arm,primecellm@ * apb_pclkdma-controller@ff6e0000arm,pl330arm,primecelln@ * apb_pclkpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ Gaclkaclk-perfhclkpm0*123syslegacyclient`  ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38|8"()coremgmtmgmt-stickypipepmpclkaclk5okay <EOdefault]interrupt-controllergethernet@fe300000rockchip,rk3399-gmac0* macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac|" )stmmaceth5okayinputrgmiiOdefault]  'P#dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@*@,р Mbiuciuciu-driveciu-sample:|"y)reset 5disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@*A,рE  Lbiuciuciu-driveciu-sample:|"z)reset5okayZ`j| Odefault] !"sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13* NE Nclk_xinclk_ahb\emmc_cardclocko# phy_arasan|5okay`usb@fe380000 generic-ehci8*$usbhostarbiterutmi%usb5okayusb@fe3a0000 generic-ohci:*$usbhostarbiterutmi%usb5okayusb@fe3c0000 generic-ehci<*&usbhostarbiterutmi'usb5okayusb@fe3e0000 generic-ohci>* &usbhostarbiterutmi'usb5okayusb@fe800000rockchip,rk3399-dwc3+|0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk"% )usb3-otg5okayusb@fe800000 snps,dwc3*i otg()usb2-phyusb3-phy utmi_wide4Un|5okayusb@fe900000rockchip,rk3399-dwc3+|0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk"& )usb3-otg5okayusb@fe900000 snps,dwc3*n host*+usb2-phyusb3-phy utmi_wide4Un|5okaydp@fec00000rockchip,rk3399-cdn-dp* rE  ruocore-clkpclkspdifgrf,-| "HJ)spdifdptxapbcore 5disabledportsport+endpoint@0.endpoint@1/interrupt-controller@fee00000 arm,gic-v3+|gP * interrupt-controller@fee20000arm,gic-v3-itsppi-partitionsinterrupt-partition-0interrupt-partition-1saradc@ff100000rockchip,rk3399-saradc*>Pesaradcapb_pclk" )saradc-apb 5disabledi2c@ff110000rockchip,rk3399-i2cAE AU i2cpclk*;Odefault]0+5okayLi2c@ff120000rockchip,rk3399-i2cBE BV i2cpclk*#Odefault]1+5okayLi2c@ff130000rockchip,rk3399-i2cCE CW i2cpclk*"Odefault]2+5okayi2c@ff140000rockchip,rk3399-i2cDE DX i2cpclk*&Odefault]3+ 5disabledi2c@ff150000rockchip,rk3399-i2cEE EY i2cpclk*%Odefault]4+5okayLi2c@ff160000rockchip,rk3399-i2cFE FZ i2cpclk*$Odefault]5+5okayLfan@18 ti,amc6821+= rtc@6f isil,isl1208oserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclk*cOYOdefault ]6785okayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclk*bOYOdefault]9 5disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclk*dOYOdefault]:5okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclk*eOYOdefault]; 5disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclk*DOdefault]<=>?+ 5disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk*5Odefault]@ABC+5okayflash@0jedec,spi-norfspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk*4Odefault]DEFG+ 5disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclk*COdefault]HIJK+ 5disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk*Odefault]LMNO|+5okaythermal-zonescpuxdPtripscpu_alert0ppassiveQcpu_alert1$passiveRcpu_crits criticalcooling-mapsmap0Q map1RgpuxdPtripsgpu_alert0$passiveSgpu_crits criticalcooling-mapsmap0S tsadc@ff260000rockchip,rk3399-tsadc&*aOE qOdtsadcapb_pclk" )tsadc-apbsOinitdefaultsleep]TUT5okay/Pqos@ffa58000syscon ]qos@ffa5c000syscon ^qos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon aqos@ffa70080syscon bqos@ffa74000syscon@ _qos@ffa76000syscon` `qos@ffa90000syscon cqos@ffa98000syscon Vqos@ffaa0000syscon dqos@ffaa0080syscon eqos@ffaa8000syscon fqos@ffaa8080syscon gqos@ffab0000syscon Wqos@ffab0080syscon Xqos@ffab8000syscon Yqos@ffac0000syscon Zqos@ffac0080syscon [qos@ffac8000syscon hqos@ffac8080syscon iqos@ffad0000syscon jqos@ffad8080syscon qos@ffae0000syscon \power-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controllerJ+pd_iep@34"^Vpd_rga@33!^WXpd_vcodec@31^Ypd_vdu@32 ^Z[pd_gpu@35#^\pd_edp@25lpd_emmc@23^]pd_gmac@22f^^pd_sd@27L^_pd_sdioaudio@28^`pd_usb3@24^abpd_vio@15+pd_hdcp@21r^cpd_isp0@19^depd_isp1@20^fgpd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17^hipd_vopl@18^jsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+io-domains&rockchip,rk3399-pmu-io-voltage-domain5okayekspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5llspiclkapb_pclk*<Odefault]mnop+ 5disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7ll"baudclkapb_pclk*fOYOdefault]q 5disabledi2c@ff3c0000rockchip,rk3399-i2c<l E l l i2cpclk*9Odefault]r+5okayLpmic@1brockchip,rk808 s*o\xin32krk808-clkout2Odefault]ttuuuuuuvuuuv*wregulatorsDCDC_REG1 7vdd_centerF q^pvqregulator-state-memDCDC_REG2 7vdd_cpu_lF q^pvq regulator-state-memDCDC_REG37vcc_ddrregulator-state-memDCDC_REG47vcc_1v8Fw@^w@kregulator-state-memw@LDO_REG1 7vcc_ldo1Fw@^w@regulator-state-memLDO_REG2 7vcc1v8_hdmiFw@^w@regulator-state-memLDO_REG3 7vcc1v8_pmuFw@^w@wregulator-state-memw@LDO_REG47vcc_sdFw@^-regulator-state-mem-LDO_REG5 7vcc_ldo5F-^-regulator-state-memLDO_REG6 7vcc_ldo6F`^`regulator-state-memLDO_REG7 7vcc0v9_hdmiF ^ regulator-state-memLDO_REG8 7vcc_efuseFw@^w@regulator-state-memSWITCH_REG1 7vcc3v3_s3regulator-state-memSWITCH_REG2 7vcc3v3_s0regulator-state-memregulator@60 fcs,fan53555`7vdd_gpuF '^İvui2c@ff3d0000rockchip,rk3399-i2c=l E l l i2cpclk*8Odefault]x+5okayLcodec@a fsl,sgtl5000 y&z2z?{5okayi2c@ff3e0000rockchip,rk3399-i2c>l E l l i2cpclk*:Odefault]|+5okayLregulator@60 fcs,fan53555`u 7vdd_cpu_bF '^İv pwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBKOdefault]}lpwm5okaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBKOdefault]~lpwm 5disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB KOdefault]lpwm5okaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0KOdefault]lpwm 5disablediommu@ff650800rockchip,iommue@*svpu_mmu aclkifaceV 5disablediommu@ff660480rockchip,iommu f@f@*u vdec_mmu aclkifaceV 5disablediommu@ff670800rockchip,iommug@**iep_mmu aclkifaceV 5disabledrga@ff680000rockchip,rk3399-rgah*7maclkhclksclk"jgi )coreaxiahb|!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruuoclE(Jlclock-controller@ff760000rockchip,rk3399-cruvoc@BCx@E#g/;рxh<4`#Fׄׄ syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domain5okaypk}kkusb2-phy@e450rockchip,rk3399-usb2phyP{phyclko\clk_usbphy0_480m5okay$host-port* linestate5okay%otg-port0*ghjotg-bvalidotg-idlinestate 5disabled(usb2-phy@e460rockchip,rk3399-usb2phy`|phyclko\clk_usbphy1_480m5okay&host-port* linestate5okay'otg-port0*lmootg-bvalidotg-idlinestate5okay*phy@f780rockchip,rk3399-emmc-phy$emmcclk5okay#pcie-phyrockchip,rk3399-pcie-phyrefclk")phy5okayphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~E|"L)uphyuphy-pipeuphy-tcphy5okaydp-port,usb3-port)phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refE| "M)uphyuphy-pipeuphy-tcphy5okaydp-port-usb3-port+watchdog@ff848000 snps,dw-wdt|*xrktimer@ff850000rockchip,rk3399-timer*QhZ pclktimerspdif@ff870000rockchip,rk3399-spdif*Btx mclkhclkUOdefault]| 5disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s*'txrxi2s_clki2s_hclkVOdefault]|5okayi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s*(txrxi2s_clki2s_hclkWOdefault]| 5disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s*)txrxi2s_clki2s_hclkX| 5disabledvop@ff8f0000rockchip,rk3399-vop-lit>*wEׄaclk_vopdclk_vophclk_vop|" )axiahbdclk5okayport+ endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4/iommu@ff8f3f00rockchip,iommu?*w vopl_mmu aclkiface|V5okayvop@ff900000rockchip,rk3399-vop-big>*vEׄaclk_vopdclk_vophclk_vop|" )axiahbdclk5okayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4.iommu@ff903f00rockchip,iommu?*v vopb_mmu aclkiface|V5okayiommu@ff914000rockchip,iommu @P*+ isp0_mmu aclkifaceV|iommu@ff924000rockchip,iommu @P*, isp1_mmu aclkifaceV|hdmi-soundsimple-audio-card i2s 1 Khdmi-sound 5disabledsimple-audio-card,cpu bsimple-audio-card,codec bhdmi@ff940000rockchip,rk3399-dw-hdmi*(tqopiahbisfrvpllgrfcec|Y5okay lportsport+endpoint@0endpoint@1mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi*- porefpclkphy_cfggrf|")apb 5disabledports+port@0+endpoint@0endpoint@1mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi*. qorefpclkphy_cfggrf|")apb 5disabledports+port@0+endpoint@0endpoint@1edp@ff970000rockchip,rk3399-edp* jlo dppclkgrfOdefault]|")dp 5disabledports+port@0+endpoint@0endpoint@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600* jobmmugpu|# 5disabledpinctrlrockchip,rk3399-pinctrl x+|Odefault]gpio0@ff720000rockchip,gpio-bankrl*  ggpio1@ff730000rockchip,gpio-banksl*  gsgpio2@ff780000rockchip,gpio-bankxP*  ggpio3@ff788000rockchip,gpio-bankxQ*  ggpio4@ff790000rockchip,gpio-bankyR*  gpcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  pcfg-pull-none-13ma  pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low clockclk-32k edpedp-hpd gmacrgmii-pins     rmii-pins      i2c0i2c0-xfer ri2c1i2c1-xfer 0i2c2i2c2-xfer 1i2c3i2c3-xfer 2i2c4i2c4-xfer   xi2c5i2c5-xfer   3i2c6i2c6-xfer   4i2c7i2c7-xfer 5i2c8i2c8-xfer |i2s0i2s0-2ch-bus@ i2s0-8ch-bus i2s1i2s1-2ch-busP sdio0sdio0-bus1 sdio0-bus4@ sdio0-cmd sdio0-clk sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    !sdmmc-clk  sdmmc-cmd  sdmmc-cd  sdmmc-wp sleepap-pwroff ddrio-pwroff spdifspdif-bus spdif-bus-1 spi0spi0-clk <spi0-cs0 ?spi0-cs1 spi0-tx =spi0-rx >spi1spi1-clk  @spi1-cs0  Cspi1-rx Bspi1-tx Aspi2spi2-clk  Dspi2-cs0  Gspi2-rx  Fspi2-tx  Espi3spi3-clk mspi3-cs0 pspi3-rx ospi3-tx nspi4spi4-clk Hspi4-cs0 Kspi4-rx Jspi4-tx Ispi5spi5-clk Lspi5-cs0 Ospi5-rx Nspi5-tx Mtestclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-gpio Totp-out Uuart0uart0-xfer 6uart0-cts 7uart0-rts 8uart1uart1-xfer   9uart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer :uart3uart3-xfer ;uart3-cts uart3-rts uart4uart4-xfer quarthdcpuarthdcp-xfer pwm0pwm0-pin }pwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin ~pwm1-pin-pull-down pwm2pwm2-pin pwm2-pin-pull-down pwm3apwm3a-pin pwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm pci-clkreqnb-cpm ledsled-module-gpio led-sd-gpio pmicpmic-int-l tusb2vcc5v0-host-en otg-vbus-drv hoghaikou-pin-hog@  opp-table0operating-points-v2  opp00 Q  5 @opp01 #F  5opp02 0,  Popp03 < Hopp04 G B@opp05 Tfr *opp-table1operating-points-v2  opp00 Q  5 @opp01 #F  5opp02 0,  0 /opp03 <  mopp04 G ~opp05 Tfr popp06 _" opp07 kI Oopp08 v İ ;opp-table2operating-points-v2opp00   5opp01 @  5opp02 ׄ  opp03 e  Yopp04 #F Hopp05 / leds gpio-ledsOdefault]module-led Fmodule_led ? Lheartbeat bsd-card-led Fsd_card_led ?s Lmmc0external-gmac-clock fixed-clockLsY@ \clkin_gmacovcc1v2-phyregulator-fixed 7vcc1v2_phyFO^Ouvcc3v3-sysregulator-fixed 7vcc3v3_sysF2Z^2Zuvvcc5v0-host-regulatorregulator-fixed  rOdefault] 7vcc5v0_hostuvcc5v0-sysregulator-fixed 7vcc5v0_sysFLK@^LK@uchosen serial0:115200n8i2s0-soundsimple-audio-card i2s KHaikou,I2S-codec 1simple-audio-card,codecy bsimple-audio-card,cpu   bsgtl5000-oscillator fixed-clockoLwydc-12vregulator-fixed7dc_12vF^vcc3v3-baseboardregulator-fixed7vcc3v3_baseboardF2Z^2Z"vcc5v0-baseboardregulator-fixed7vcc5v0_baseboardFLK@^LK@vcc5v0-otg-regulatorregulator-fixed  Odefault] 7vcc5v0_otgvdda-codecregulator-fixed 7vdda_codecF2Z^2Zzvddd-codecregulator-fixed 7vddd_codecFj^j{ compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8mmc0mmc1mmc2serial0serial1serial2serial3serial4cpudevice_typeregenable-methodclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-supplyphandleportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesvqmmcbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpvmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsi2c-scl-rising-time-nsi2c-scl-falling-time-nscooling-min-statecooling-max-statereg-shiftreg-io-widthspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyVDDA-supplyVDDIO-supplyVDDD-supply#pwm-cells#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdmasdma-namesrockchip,playback-channelsrockchip,capture-channelsiommusrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendturbo-modelabellinux,default-triggerpanic-indicatorenable-active-lowstdout-pathbitclock-masterframe-masterenable-active-high