8(3ti,dra718-evmti,dra718ti,dra722ti,dra72ti,dra7&7TI DRA718 EVMchosenB=/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0?X/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0?]/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0Bb/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Bj/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Br/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bz/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0B/ocp/interconnect@48400000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48400000/segment@0/target-module@22000/serial@0B/ocp/interconnect@48400000/segment@0/target-module@24000/serial@0E/ocp/interconnect@4ae00000/segment@20000/target-module@b000/serial@0X/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@1X/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@2B/ocp/interconnect@4ae00000/segment@30000/target-module@c000/can@0?/ocp/interconnect@48400000/segment@0/target-module@80000/can@0/ocp/spi@4b300000/ocp/ipu@58820000/ocp/ipu@55020000/ocp/dsp@40800000 /connectortimerarm,armv7-timer disabled0   &interrupt-controller@48211000arm,cortex-a15-gic @/H!H! H!@ H!`   &3interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpu /H(&3cpuscpu@0;cpuarm,cortex-a15/G[bcpun|3opp-tableoperating-points-v2-ti-cpu3opp_nom-1000000000;, P0, P0opp_od-1176000000FV@ @@ @opp_high@1500000000Yh/v~v~socti,omap-inframpu ti,omap5-mpumpuocpti,dra7-l3-nocsimple-busl3_main_1l3_main_2 /DE  interconnect@4a000000ti,dra7-l4-cfgsimple-bus/JJJ aplaia0$JJ J segment@0 simple-bus\ @@PP`` ``pp      @@PP``pp target-module@2000ti,sysc-omap4ti,sysc/ rev  scm@0ti,dra7-scm-coresimple-bus/   scm_conf@0sysconsimple-bus/ 3pbias_regulator@e00ti,pbias-dra7ti,pbias-omap/pbias_mmc_omap5 pbias_mmc_omap5w@02Z3phy-gmii-selti,dra7xx-phy-gmii-sel/TH3clocksdss_deshdcp_clk@558Sti,gate-clock[ `/Xehrpwm0_tbclk@558Sti,gate-clock[ `/X3ehrpwm1_tbclk@558Sti,gate-clock[ `/X3ehrpwm2_tbclk@558Sti,gate-clock[ `/X3sys_32k_ckS ti,mux-clock[ `/3Opinmux@1400ti,dra7-padconfpinctrl-single/hm | ?3dcan1_pins_default3dcan1_pins_sleep3mmc1_pins_default_no_clk_pu0TX\`dh3mmc1_pins_default0TX\`dhmmc1_pins_sdr120TX\`dh3mmc1_pins_hs0TX\`dh3mmc1_pins_sdr250TX\`dh3mmc1_pins_sdr500TX\`dh3mmc1_pins_ddr50_rev100TX\`dhmmc1_pins_ddr50_rev200TX\`dh3mmc1_pins_sdr1040TX\`dh3mmc2_pins_defaultP3mmc2_pins_hsP3mmc2_pins_ddr_rev10Pmmc2_pins_ddr_rev20P3mmc2_pins_hs200P3mmc4_pins_default03scm_conf@1c04syscon/ 3scm_conf@1c24syscon/$$3^dma-router@b78ti,dra7-dma-crossbar/ x 3dma-router@c78ti,dra7-dma-crossbar/ x|3target-module@5000ti,sysc-omap4ti,sysc/Prev Pcm_core_aon@0ti,dra7-cm-core-aonsimple-bus/   clocksatl_clkin0_ckSti,dra7-atl-clock [3atl_clkin1_ckSti,dra7-atl-clock [3atl_clkin2_ckSti,dra7-atl-clock [3atl_clkin3_ckSti,dra7-atl-clock [3hdmi_clkin_ckS fixed-clock 3/mlb_clkin_ckS fixed-clock 3mlbp_clkin_ckS fixed-clock 3pciesref_acs_clk_ckS fixed-clock 3?ref_clkin0_ckS fixed-clock ref_clkin1_ckS fixed-clock ref_clkin2_ckS fixed-clock ref_clkin3_ckS fixed-clock rmii_clk_ckS fixed-clock sdvenc_clkin_ckS fixed-clock secure_32k_clk_src_ckS fixed-clock 3vsys_clk32_crystal_ckS fixed-clock 3 sys_clk32_pseudo_ckSfixed-factor-clock[(b3 virt_12000000_ckS fixed-clock 3dvirt_13000000_ckS fixed-clock ]@virt_16800000_ckS fixed-clock Y3fvirt_19200000_ckS fixed-clock $3gvirt_20000000_ckS fixed-clock 1-3evirt_26000000_ckS fixed-clock 3hvirt_27000000_ckS fixed-clock 3ivirt_38400000_ckS fixed-clock I3jsys_clkin2S fixed-clock X3kusb_otg_clkin_ckS fixed-clock 3svideo1_clkin_ckS fixed-clock 39video1_m2_clkin_ckS fixed-clock 3.video2_clkin_ckS fixed-clock 3:video2_m2_clkin_ckS fixed-clock 3-dpll_abe_ck@1e0Sti,omap4-dpll-m4xen-clock[/3dpll_abe_x2_ckSti,omap4-dpll-x2-clock[3dpll_abe_m2x2_ck@1f0Sti,divider-clock[2=/Of3abe_clk@108Sti,divider-clock[2/}3mdpll_abe_m2_ck@1f0Sti,divider-clock[2=/Of3odpll_abe_m3x2_ck@1f4Sti,divider-clock[2=/Of3dpll_core_byp_mux@12cS ti,mux-clock[`/,3dpll_core_ck@120Sti,omap4-dpll-core-clock[/ $,(3dpll_core_x2_ckSti,omap4-dpll-x2-clock[3dpll_core_h12x2_ck@13cSti,divider-clock[2?=/<Of3mpu_dpll_hs_clk_divSfixed-factor-clock[(3dpll_mpu_ck@160Sti,omap5-mpu-dpll-clock[/`dlh3dpll_mpu_m2_ck@170Sti,divider-clock[2=/pOf3mpu_dclk_divSfixed-factor-clock[(3zdsp_dpll_hs_clk_divSfixed-factor-clock[(3dpll_dsp_byp_mux@240S ti,mux-clock[`/@3dpll_dsp_ck@234Sti,omap4-dpll-clock[/48@<#F3dpll_dsp_m2_ck@244Sti,divider-clock[2=/DOf #F3 iva_dpll_hs_clk_divSfixed-factor-clock[(3!dpll_iva_byp_mux@1acS ti,mux-clock[!`/3"dpll_iva_ck@1a0Sti,omap4-dpll-clock["/#Ep}@3#dpll_iva_m2_ck@1b0Sti,divider-clock[#2=/Of$%3$iva_dclkSfixed-factor-clock[$(3|dpll_gpu_byp_mux@2e4S ti,mux-clock[`/3%dpll_gpu_ck@2d8Sti,omap4-dpll-clock[%/&Ly@3&dpll_gpu_m2_ck@2e8Sti,divider-clock[&2=/Of'_(k3'dpll_core_m2_ck@130Sti,divider-clock[2=/0Of3(core_dpll_out_dclk_divSfixed-factor-clock[((3~dpll_ddr_byp_mux@21cS ti,mux-clock[`/3)dpll_ddr_ck@210Sti,omap4-dpll-clock[)/3*dpll_ddr_m2_ck@220Sti,divider-clock[*2=/ Of3pdpll_gmac_byp_mux@2b4S ti,mux-clock[`/3+dpll_gmac_ck@2a8Sti,omap4-dpll-clock[+/3,dpll_gmac_m2_ck@2b8Sti,divider-clock[,2=/Of3qvideo2_dclk_divSfixed-factor-clock[-(3video1_dclk_divSfixed-factor-clock[.(3hdmi_dclk_divSfixed-factor-clock[/(3per_dpll_hs_clk_divSfixed-factor-clock[(3Busb_dpll_hs_clk_divSfixed-factor-clock[(3Feve_dpll_hs_clk_divSfixed-factor-clock[(30dpll_eve_byp_mux@290S ti,mux-clock[0`/31dpll_eve_ck@284Sti,omap4-dpll-clock[1/32dpll_eve_m2_ck@294Sti,divider-clock[22=/Of33eve_dclk_divSfixed-factor-clock[3(3dpll_core_h13x2_ck@140Sti,divider-clock[2?=/@Ofdpll_core_h14x2_ck@144Sti,divider-clock[2?=/DOf3Pdpll_core_h22x2_ck@154Sti,divider-clock[2?=/TOf3<dpll_core_h23x2_ck@158Sti,divider-clock[2?=/XOf3Udpll_core_h24x2_ck@15cSti,divider-clock[2?=/\Ofdpll_ddr_x2_ckSti,omap4-dpll-x2-clock[*34dpll_ddr_h11x2_ck@228Sti,divider-clock[42?=/(Ofdpll_dsp_x2_ckSti,omap4-dpll-x2-clock[35dpll_dsp_m3x2_ck@248Sti,divider-clock[52=/HOf6ׄ36dpll_gmac_x2_ckSti,omap4-dpll-x2-clock[,37dpll_gmac_h11x2_ck@2c0Sti,divider-clock[72?=/Of38dpll_gmac_h12x2_ck@2c4Sti,divider-clock[72?=/Ofdpll_gmac_h13x2_ck@2c8Sti,divider-clock[72?=/Ofdpll_gmac_m3x2_ck@2bcSti,divider-clock[72=/Ofgmii_m_clk_divSfixed-factor-clock[8(hdmi_clk2_divSfixed-factor-clock[/(hdmi_div_clkSfixed-factor-clock[/(l3_iclk_div@100Sti,divider-clock2`/[}3 l4_root_clk_divSfixed-factor-clock[ (3 video1_clk2_divSfixed-factor-clock[9(video1_div_clkSfixed-factor-clock[9(video2_clk2_divSfixed-factor-clock[:(video2_div_clkSfixed-factor-clock[:(dummy_ckS fixed-clock clockdomainsmpu-cm@300 ti,omap4-cm/ mpu-clkctrl@20 ti,clkctrl/ Sdsp1-cm@400 ti,omap4-cm/ dsp1-clkctrl@20 ti,clkctrl/ S3ipu-cm@500 ti,omap4-cm/ ipu1-clkctrl@20 ti,clkctrl/ S ;<3;ipu-clkctrl@50 ti,clkctrl/P4S3dsp2-cm@600 ti,omap4-cm/ dsp2-clkctrl@20 ti,clkctrl/ Srtc-cm@700 ti,omap4-cm/` `rtc-clkctrl@20 ti,clkctrl/ (S3vpe-cm@760 ti,omap4-cm/`  ` vpe-clkctrl@0 ti,clkctrl/ S3target-module@8000ti,sysc-omap4ti,sysc/rev  cm_core@0ti,dra7-cm-coresimple-bus/0 0clocksdpll_pcie_ref_ck@200Sti,omap4-dpll-clock[/ 3=dpll_pcie_ref_m2ldo_ck@210Sti,divider-clock[=2=/Of3>apll_pcie_in_clk_mux@4ae06118 ti,mux-clock[>?S/`3@apll_pcie_ck@21cSti,dra7-apll-clock[@=/ 3Aoptfclk_pciephy_div@4a00821cti,divider-clock[AS/`23`apll_pcie_clkvcoldoSfixed-factor-clock[A(apll_pcie_clkvcoldo_divSfixed-factor-clock[A(apll_pcie_m2_ckSfixed-factor-clock[A(3udpll_per_byp_mux@14cS ti,mux-clock[B`/L3Cdpll_per_ck@140Sti,omap4-dpll-clock[C/@DLH3Ddpll_per_m2_ck@150Sti,divider-clock[D2=/POf3Efunc_96m_aon_dclk_divSfixed-factor-clock[E(3dpll_usb_byp_mux@18cS ti,mux-clock[F`/3Gdpll_usb_ck@180Sti,omap4-dpll-j-type-clock[G/3Hdpll_usb_m2_ck@190Sti,divider-clock[H2=/Of3Ldpll_pcie_ref_m2_ck@210Sti,divider-clock[=2=/Of3tdpll_per_x2_ckSti,omap4-dpll-x2-clock[D3Idpll_per_h11x2_ck@158Sti,divider-clock[I2?=/XOf3Jdpll_per_h12x2_ck@15cSti,divider-clock[I2?=/\Ofdpll_per_h13x2_ck@160Sti,divider-clock[I2?=/`Ofdpll_per_h14x2_ck@164Sti,divider-clock[I2?=/dOf3Qdpll_per_m2x2_ck@150Sti,divider-clock[I2=/POf3Kdpll_usb_clkdcoldoSfixed-factor-clock[H(3Nfunc_128m_clkSfixed-factor-clock[J(func_12m_fclkSfixed-factor-clock[K(func_24m_clkSfixed-factor-clock[E(func_48m_fclkSfixed-factor-clock[K(func_96m_fclkSfixed-factor-clock[K(l3init_60m_fclk@104Sti,divider-clock[L/clkout2_clk@6b0Sti,gate-clock[M`/l3init_960m_gfclk@6c0Sti,gate-clock[N`/usb_phy1_always_on_clk32k@640Sti,gate-clock[O`/@3Zusb_phy2_always_on_clk32k@688Sti,gate-clock[O`/3\usb_phy3_always_on_clk32k@698Sti,gate-clock[O`/3]gpu_core_gclk_mux@1220S ti,mux-clock [PQ'`/ R'3Rgpu_hyd_gclk_mux@1220S ti,mux-clock [PQ'`/ S'3Sl3instr_ts_gclk_div@e50Sti,divider-clock[T`/P  vip1_gclk_mux@1020S ti,mux-clock[ U`/ vip2_gclk_mux@1028S ti,mux-clock[ U`/(vip3_gclk_mux@1030S ti,mux-clock[ U`/0clockdomainscoreaon_clkdmti,clockdomain[Hcoreaon-cm@600 ti,omap4-cm/ coreaon-clkctrl@20 ti,clkctrl/ S3al3main1-cm@700 ti,omap4-cm/ l3main1-clkctrl@20 ti,clkctrl/ tS3ipu2-cm@900 ti,omap4-cm/   ipu2-clkctrl@20 ti,clkctrl/ S3dma-cm@a00 ti,omap4-cm/   dma-clkctrl@20 ti,clkctrl/ S3Xemif-cm@b00 ti,omap4-cm/   emif-clkctrl@20 ti,clkctrl/ Satl-cm@c00 ti,omap4-cm/   atl-clkctrl@0 ti,clkctrl/S3l4cfg-cm@d00 ti,omap4-cm/   l4cfg-clkctrl@20 ti,clkctrl/ S3bl3instr-cm@e00 ti,omap4-cm/ l3instr-clkctrl@20 ti,clkctrl/ Scam-cm@1000 ti,omap4-cm/ cam-clkctrl@20 ti,clkctrl/ ,S3dss-cm@1100 ti,omap4-cm/ dss-clkctrl@20 ti,clkctrl/ S3gpu-cm@1200 ti,omap4-cm/ gpu-clkctrl@20 ti,clkctrl/ S3l3init-cm@1300 ti,omap4-cm/ l3init-clkctrl@20 ti,clkctrl/ lS3Ypcie-clkctrl@b0 ti,clkctrl/ S3_gmac-clkctrl@d0 ti,clkctrl/S3l4per-cm@1700 ti,omap4-cm/ l4per-clkctrl@28 ti,clkctrl(/(d$<@pS V\W3l4sec-clkctrl@1a0 ti,clkctrl/,S3l4per2-clkctrl@c ti,clkctrl@/  8` x$<S3Vl4per3-clkctrl@14 ti,clkctrl/0S3target-module@56000ti,sysc-omap2ti,sysc/``,`(revsyscsyss# [Xbfck `dma-controller@0ti,omap4430-sdmati,omap-sdma/0   3 target-module@5e000ti,sysc disabled  target-module@80000ti,sysc-omap2ti,sysc/revsyscsyss  [Ybfck ocp2scp@0ti,omap-ocp2scp / phy@4000ti,dra7x-usb2ti,omap-usb2/@[ZYbwkupclkrefclkH/[3phy@5000 ti,dra7x-usb2-phy2ti,omap-usb2/Pt[\Y bwkupclkrefclkH/[3phy@4400 ti,omap-usb3/DHdL@phy_rxphy_txpll_ctrlp[]YbwkupclksysclkrefclkH3target-module@90000ti,sysc-omap2ti,sysc/   revsyscsyss  [Ybfck  ocp2scp@0ti,omap-ocp2scp / pciephy@4000ti,phy-pipe3-pcie/@Ddphy_rxphy_tx^:^4[=>__ _ `;bdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkH3pciephy@5000ti,phy-pipe3-pcie/PTdphy_rxphy_tx^ :^4[=>__ _ `;bdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkH disabled3phy@6000ti,phy-pipe3-sata/`ddh@phy_rxphy_txpll_ctrlt[YhbsysclkrefclkEH disabled3target-module@a0000ti,sysc disabled  target-module@d9000ti,sysc-omap4-srti,sysc/ 8sysc [abfck  target-module@dd000ti,sysc-omap4-srti,sysc/ 8sysc [abfck  target-module@e0000ti,sysc disabled target-module@f4000ti,sysc-omap4ti,sysc/@@ revsysc  [bbfck @mailbox@0ti,omap4-mailbox/$Uas disabledtarget-module@f6000ti,sysc-omap2ti,sysc/```revsyscsyss  [bbfck `spinlock@0ti,omap4-hwspinlock/segment@100000 simple-bus  00  00@@PP``pp  00@@PP``pp  00@@PP``pp  00@@PP``pptarget-module@2000ti,sysc disabled  target-module@8000ti,sysc disabled target-module@40000ti,sysc disabled target-module@51000ti,sysc disabled target-module@53000ti,sysc disabled 0target-module@55000ti,sysc disabled Ptarget-module@57000ti,sysc disabled ptarget-module@59000ti,sysc disabled target-module@5b000ti,sysc disabled target-module@5d000ti,sysc disabled target-module@5f000ti,sysc disabled target-module@61000ti,sysc disabled target-module@63000ti,sysc disabled 0target-module@65000ti,sysc disabled Ptarget-module@67000ti,sysc disabled ptarget-module@69000ti,sysc disabled target-module@6b000ti,sysc disabled target-module@6d000ti,sysc disabled target-module@71000ti,sysc disabled target-module@73000ti,sysc disabled 0target-module@75000ti,sysc disabled Ptarget-module@77000ti,sysc disabled ptarget-module@79000ti,sysc disabled target-module@7b000ti,sysc disabled target-module@7d000ti,sysc disabled target-module@81000ti,sysc disabled target-module@83000ti,sysc disabled 0target-module@85000ti,sysc disabled Ptarget-module@87000ti,sysc disabled psegment@200000 simple-bus!!        !! ! 0!0@!@P!P""!!!!""@"@P"P`"`p"p""""## # 0#0@#@P#P`#`p#p!!target-module@0ti,sysc disabled target-module@a000ti,sysc disabled target-module@c000ti,sysc disabled target-module@e000ti,sysc disabled target-module@10000ti,sysc disabled target-module@12000ti,sysc disabled  target-module@14000ti,sysc disabled @target-module@18000ti,sysc disabled target-module@1a000ti,sysc disabled target-module@1c000ti,sysc disabled target-module@1e000ti,sysc disabled target-module@20000ti,sysc disabled target-module@24000ti,sysc disabled @target-module@26000ti,sysc disabled `target-module@2a000ti,sysc disabled target-module@2c000ti,sysc disabled target-module@2e000ti,sysc disabled target-module@30000ti,sysc disabled target-module@32000ti,sysc disabled  target-module@34000ti,sysc disabled @target-module@36000ti,sysc disabled `interconnect@4ae00000ti,dra7-l4-wkupsimple-bus/JJJ aplaia00JJJJsegment@0 simple-busl`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc/@@ revsysc [c0bfck @counter@0ti,omap-counter32k/@target-module@6000ti,sysc-omap4ti,sysc/`rev ` prm@0ti,dra7-prmsimple-bus/0  0clockssys_clkin1@110S ti,mux-clock[defghij/O3abe_dpll_sys_clk_mux@118S ti,mux-clock[k/3labe_dpll_bypass_clk_mux@114S ti,mux-clock[lO/3abe_dpll_clk_mux@10cS ti,mux-clock[lO/ 3abe_24m_fclk@11cSti,divider-clock[/3Waess_fclk@178Sti,divider-clock[m/x23nabe_giclk_div@174Sti,divider-clock[n/t2abe_lp_clk_div@1d8Sti,divider-clock[/ 3abe_sys_clk_div@120Sti,divider-clock[/ 2adc_gfclk_mux@1dcS ti,mux-clock [kO/sys_clk1_dclk_div@1c8Sti,divider-clock[2@/}3wsys_clk2_dclk_div@1ccSti,divider-clock[k2@/}3xper_abe_x1_dclk_div@1bcSti,divider-clock[o2@/}3ydsp_gclk_div@18cSti,divider-clock[ 2@/}3{gpu_dclk@1a0Sti,divider-clock['2@/}3}emif_phy_dclk_div@190Sti,divider-clock[p2@/}3gmac_250m_dclk_div@19cSti,divider-clock[q2@/}3rgmac_main_clkSfixed-factor-clock[r(3l3init_480m_dclk_div@1acSti,divider-clock[L2@/}3usb_otg_dclk_div@184Sti,divider-clock[s2@/}3sata_dclk_div@1c0Sti,divider-clock[2@/}3pcie2_dclk_div@1b8Sti,divider-clock[t2@/}3pcie_dclk_div@1b4Sti,divider-clock[u2@/}3emu_dclk_div@194Sti,divider-clock[2@/}3secure_32k_dclk_div@1c4Sti,divider-clock[v2@/}3clkoutmux0_clk_mux@158S ti,mux-clockX[wxyz{|}~r/Xclkoutmux1_clk_mux@15cS ti,mux-clockX[wxyz{|}~r/\clkoutmux2_clk_mux@160S ti,mux-clockX[wxyz{|}~r/`3Mcustefuse_sys_gfclk_divSfixed-factor-clock[(eve_clk@180S ti,mux-clock[36/hdmi_dpll_clk_mux@164S ti,mux-clock[k/dmlb_clk@134Sti,divider-clock[2@/4}mlbp_clk@130Sti,divider-clock[2@/0}per_abe_x1_gfclk2_div@138Sti,divider-clock[o2@/8}timer_sys_clk_div@144Sti,divider-clock[/D23video1_dpll_clk_mux@168S ti,mux-clock[k/hvideo2_dpll_clk_mux@16cS ti,mux-clock[k/lwkupaon_iclk_mux@108S ti,mux-clock[/3Tclockdomainswkupaon-cm@1800 ti,omap4-cm/ wkupaon-clkctrl@20 ti,clkctrl/ lS3cprm@400"ti,dra7-prm-instti,omap-prm-inst/3prm@500"ti,dra7-prm-instti,omap-prm-inst/3prm@700"ti,dra7-prm-instti,omap-prm-inst/3prm@f00"ti,dra7-prm-instti,omap-prm-inst/prm@1b00"ti,dra7-prm-instti,omap-prm-inst/@prm@1b40"ti,dra7-prm-instti,omap-prm-inst/@@prm@1b80"ti,dra7-prm-instti,omap-prm-inst/@prm@1bc0"ti,dra7-prm-instti,omap-prm-inst/@prm@1c00"ti,dra7-prm-instti,omap-prm-inst/`target-module@c000ti,sysc-omap4ti,sysc/rev scm_conf@0syscon/3segment@10000 simple-bus`@@PPtarget-module@0ti,sysc-omap2ti,sysc/revsyscsyss[cc bfckdbclk gpio@0ti,omap4-gpio/  target-module@4000ti,sysc-omap2ti,sysc/@@@revsyscsyss" [cbfck @wdt@0 ti,omap3-wdt/ Ktarget-module@8000ti,sysc-omap4-timerti,sysc/ revsysc [c bfck timer@0ti,omap5430-timer/ [c bfck  c Otarget-module@c000ti,sysc disabled segment@20000 simple-bus``  00pptarget-module@0ti,sysc-omap4-timerti,sysc/ revsysc [c(bfck timer@0ti,omap5430-timer/ Ztarget-module@2000ti,sysc disabled  target-module@6000ti,sysc disabledH`p (*0target-module@b000ti,sysc-omap2ti,sysc/PTXrevsyscsyss [c`bfck serial@0ti,dra742-uartti,omap4-uart/  l disabledtarget-module@f000ti,sysc disabled segment@30000 simple-bus   00@@PP``pptarget-module@1000ti,sysc disabled target-module@3000ti,sysc disabled 0target-module@5000ti,sysc disabled Ptarget-module@7000ti,sysc disabled ptarget-module@9000ti,sysc disabled target-module@c000ti,sysc-omap4ti,sysc/ rev [chbfck  can@0ti,dra7-d_can/  X  [chokay defaultsleepactive!+interconnect@48000000ti,dra7-l4-per1simple-bus0/HHHHHHaplaia0ia1ia2ia3H H segment@0 simple-bus  00@@PP``ppPP``pp  0000@@  0 0``pp          @ @ ` ` @   ``pp @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,sysc/PTXrevsyscsyss [(bfck serial@0ti,dra742-uartti,omap4-uart/ E l disabled556:txrxtarget-module@32000ti,sysc-omap4-timerti,sysc/   revsysc [bfck  timer@0ti,omap5430-timer/[bfcktimer_sys_ck !target-module@34000ti,sysc-omap4-timerti,sysc/@@ revsysc [bfck @timer@0ti,omap5430-timer/[bfcktimer_sys_ck " 3target-module@36000ti,sysc-omap4-timerti,sysc/`` revsysc [ bfck `timer@0ti,omap5430-timer/[ bfcktimer_sys_ck #  3target-module@3e000ti,sysc-omap4-timerti,sysc/ revsysc [(bfck timer@0ti,omap5430-timer/[(bfcktimer_sys_ck (3target-module@51000ti,sysc-omap2ti,sysc/revsyscsyss[ bfckdbclk gpio@0ti,omap4-gpio/  3target-module@53000ti,sysc-omap2ti,sysc/001revsyscsyss[ bfckdbclk 0gpio@0ti,omap4-gpio/ t target-module@55000ti,sysc-omap2ti,sysc/PPQrevsyscsyss[88 bfckdbclk Pgpio@0ti,omap4-gpio/  target-module@57000ti,sysc-omap2ti,sysc/ppqrevsyscsyss[@@ bfckdbclk pgpio@0ti,omap4-gpio/  target-module@59000ti,sysc-omap2ti,sysc/revsyscsyss[HH bfckdbclk gpio@0ti,omap4-gpio/  target-module@5b000ti,sysc-omap2ti,sysc/revsyscsyss[PP bfckdbclk gpio@0ti,omap4-gpio/  3target-module@5d000ti,sysc-omap2ti,sysc/revsyscsyss[XX bfckdbclk gpio@0ti,omap4-gpio/  3target-module@60000ti,sysc-omap2ti,sysc/revsyscsyss [bfck i2c@0 ti,omap4-i2c/ 8 disabledtarget-module@66000ti,sysc-omap2ti,sysc/`P`T`Xrevsyscsyss [Hbfck `serial@0ti,dra742-uartti,omap4-uart/ d l disabled5?@:txrxtarget-module@68000ti,sysc-omap2ti,sysc/PTXrevsyscsyss [0bfck serial@0ti,dra742-uartti,omap4-uart/ e l disabled5OP:txrxtarget-module@6a000ti,sysc-omap2ti,sysc/PTXrevsyscsyss [bfck serial@0ti,dra742-uartti,omap4-uart/C lokay512:txrxtarget-module@6c000ti,sysc-omap2ti,sysc/PTXrevsyscsyss [ bfck serial@0ti,dra742-uartti,omap4-uart/ D l disabled534:txrxtarget-module@6e000ti,sysc-omap2ti,sysc/PTXrevsyscsyss [0bfck serial@0ti,dra742-uartti,omap4-uart/ A l disabled578:txrxtarget-module@70000ti,sysc-omap2ti,sysc/revsyscsyss [xbfck i2c@0 ti,omap4-i2c/ 3okay gpio@20 nxp,pcf8575/  &3gpio@21ti,pcf8575nxp,pcf8575/!D &3tlv320aic3106@19Yti,tlv320aic3106/j(xokay3lp8733@60 ti,lp8733/`regulatorsbuck0  lp8733-buck0 P0 buck1  lp8733-buck1 P0 ldo0  lp8733-ldo02Z02Zldo1  lp8733-ldo12Z02Z 3[lp8732@61 ti,lp8732/aregulatorsbuck0  lp8732-buck0w@0w@ 3buck1  lp8732-buck1p0p ldo0  lp8732-ldo0w@0w@ 3ldo1  lp8732-ldo1w@0w@ 3target-module@72000ti,sysc-omap2ti,sysc/   revsyscsyss [bfck  i2c@0 ti,omap4-i2c/ 4 disabledtarget-module@78000ti,sysc-omap2ti,sysc/revsyscsyss [0bfck elm@0ti,am3352-elm/ okay3target-module@7a000ti,sysc-omap2ti,sysc/revsyscsyss [bfck i2c@0 ti,omap4-i2c/ 9 disabledtarget-module@7c000ti,sysc-omap2ti,sysc/revsyscsyss [(bfck i2c@0 ti,omap4-i2c/ 7okay pcf8575@26ti,pcf8575nxp,pcf8575/&D+3p1'- 8vin6_sel_s0p0'B8pm_oe_nov5640@3c ovti,ov5640/<[bxclkportendpointN^j3target-module@86000ti,sysc-omap4-timerti,sysc/`` revsysc [bfck `timer@0ti,omap5430-timer/[bfcktimer_sys_ck )3target-module@88000ti,sysc-omap4-timerti,sysc/ revsysc [bfck timer@0ti,omap5430-timer/[bfcktimer_sys_ck *3target-module@90000ti,sysc-omap2ti,sysc/   revsysc [ bfck  rng@0 ti,omap4-rng/  /[ bfcktarget-module@98000ti,sysc-omap4ti,sysc/   revsysc [bfck  spi@0ti,omap4-mcspi/ <u@5#$%&'()* :tx0rx0tx1rx1tx2rx2tx3rx3 disabledtarget-module@9a000ti,sysc-omap4ti,sysc/   revsysc [bfck  spi@0ti,omap4-mcspi/ =u 5+,-.:tx0rx0tx1rx1 disabledtarget-module@9c000ti,sysc-omap4ti,sysc/   revsysc [Ybfck  mmc@0ti,dra7-sdhci/ Nokay q* defaulthssdr12sdr25sdr50ddr50sdr104 !+target-module@a2000ti,sysc disabled  target-module@a4000ti,sysc disabled @ Ptarget-module@a5000ti,sysc-omap2ti,sysc/ P0 P4 P8revsyscsyss [bfck  Pdes@0 ti,omap4-des/ M5ut:txrx[ bfcktarget-module@a8000ti,sysc disabled  @target-module@ad000ti,sysc-omap4ti,sysc/   revsysc [bfck  mmc@0ti,dra7-sdhci/ Y disabledА @target-module@b2000ti,sysc-omap2ti,sysc/   revsyscsyss [`bfck  1w@0 ti,omap3-1w/ 5target-module@b4000ti,sysc-omap4ti,sysc/ @ @ revsysc [Ybfck  @mmc@0ti,dra7-sdhci/ Qokay q  defaulthsddr_1_8vhs200_1_8v+!+target-module@b8000ti,sysc-omap4ti,sysc/   revsysc [bfck  spi@0ti,omap4-mcspi/ Vu5:tx0rx0 disabledtarget-module@ba000ti,sysc-omap4ti,sysc/   revsysc [bfck  spi@0ti,omap4-mcspi/ +u5FG:tx0rx0 disabledtarget-module@d1000ti,sysc-omap4ti,sysc/   revsysc [bfck  mmc@0ti,dra7-sdhci/ [okay q @9L+ defaulthssdr12sdr25!+wifi@2 ti,wl1835/&target-module@d5000ti,sysc disabled  Psegment@200000 simple-businterconnect@48400000ti,dra7-l4-per2simple-bus(/H@H@H@H@H@aplaia0ia1ia2lH@@EE@EE@FF@HC`HC`@HCHC@HDHD@HEHE@HE@HE@@segment@0 simple-busT@@@   @@ ``  ``pp     00   @@ `` @@PP   00@@PP``pp EE@EE@FF@HC`HC`@HCHC@HDHD@HEHE@HE@HE@@target-module@20000ti,sysc-omap2ti,sysc/PTXrevsyscsyss [Vbfck serial@0ti,dra742-uartti,omap4-uart/  l disabledtarget-module@22000ti,sysc-omap2ti,sysc/ P T Xrevsyscsyss [Vbfck  serial@0ti,dra742-uartti,omap4-uart/  l disabledtarget-module@24000ti,sysc-omap2ti,sysc/@P@T@Xrevsyscsyss [Vbfck @serial@0ti,dra742-uartti,omap4-uart/  l disabledtarget-module@2c000ti,sysc disabled target-module@36000ti,sysc disabled `target-module@3a000ti,sysc disabled target-module@3c000ti,sysc-omap4ti,sysc/rev [bfck atl@0 ti,dra7-atl/b [bfckokaylko @V"atl2uytarget-module@3e000ti,sysc-omap4ti,sysc/ revsysc  [Vbfck epwmss@0 ti,dra746-pwmssti,am33xx-pwmss/0 disabled ecap@100ti,dra746-ecapti,am3352-ecap}/[ bfck disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm}/[  btbclkfck disabledtarget-module@40000ti,sysc-omap4ti,sysc/ revsysc  [Vbfck epwmss@0 ti,dra746-pwmssti,am33xx-pwmss/0 disabled ecap@100ti,dra746-ecapti,am3352-ecap}/[ bfck disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm}/[  btbclkfck disabledtarget-module@42000ti,sysc-omap4ti,sysc/   revsysc  [Vbfck  epwmss@0 ti,dra746-pwmssti,am33xx-pwmss/0 disabled ecap@100ti,dra746-ecapti,am3352-ecap}/[ bfck disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwm}/[  btbclkfck disabledtarget-module@46000ti,sysc disabled `target-module@48000ti,sysc disabled target-module@4a000ti,sysc disabled target-module@4c000ti,sysc disabled target-module@50000ti,sysc disabled target-module@54000ti,sysc disabled @target-module@58000ti,sysc disabled  target-module@5b000ti,sysc disabled target-module@5d000ti,sysc disabled target-module@60000ti,sysc-dra7-mcaspti,sysc/ revsysc $[bfckahclkxahclkr EE@mcasp@0ti,dra7-mcasp-audio/ Empudathgtxrx5:txrx$[bfckahclkxahclkr disabledtarget-module@64000ti,sysc-dra7-mcaspti,sysc/@@ revsysc $[VTVTVTbfckahclkxahclkr@ EE@mcasp@0ti,dra7-mcasp-audio/ Empudattxrx5:txrx$[VTVTbfckahclkxahclkr disabledtarget-module@68000ti,sysc-dra7-mcaspti,sysc/ revsysc [V\V\ bfckahclkx FF@mcasp@0ti,dra7-mcasp-audio/ Fmpudattxrx5:txrx[V\V\ bfckahclkxokayY V\  3target-module@6c000ti,sysc-dra7-mcaspti,sysc/ revsysc [VV bfckahclkx HC`HC`@mcasp@0ti,dra7-mcasp-audio/ HC`mpudattxrx5:txrx[VV bfckahclkx disabledtarget-module@70000ti,sysc-dra7-mcaspti,sysc/ revsysc [VlVl bfckahclkx HCHC@mcasp@0ti,dra7-mcasp-audio/ HCmpudattxrx5:txrx[VlVl bfckahclkx disabledtarget-module@74000ti,sysc-dra7-mcaspti,sysc/@@ revsysc [VV bfckahclkx@ HDHD@mcasp@0ti,dra7-mcasp-audio/ HDmpudattxrx5:txrx[VV bfckahclkx disabledtarget-module@78000ti,sysc-dra7-mcaspti,sysc/ revsysc [VV bfckahclkx HEHE@mcasp@0ti,dra7-mcasp-audio/ HEmpudattxrx5:txrx[VV bfckahclkx disabledtarget-module@7c000ti,sysc-dra7-mcaspti,sysc/ revsysc [VV bfckahclkx HE@HE@@mcasp@0ti,dra7-mcasp-audio/ HE@mpudattxrx5:txrx[VV bfckahclkx disabledtarget-module@80000ti,sysc-omap4ti,sysc/ rev [Vbfck  can@0ti,dra7-d_can/  X [ disabledtarget-module@84000ti,sysc-omap4-simpleti,sysc/RRRrevsyscsyss [bfck @@switch@0#ti,dra7-cpsw-switchti,cpsw-switch/@ @[bfckokay0NOPQrx_threshrxtxmisc$  ethernet-portsport@1/port1 rgmii-idport@2/port2 rgmii-idmdio@1000ti,cpsw-mdioti,davinci_mdio[bfckB@/ethernet-phy@2/1FTl3ethernet-phy@3/1FTl3cpts [bcptstarget-module@5b000ti,sysc-omap4ti,sysc/ revsysc [bfck cal@0 ti,dra72-cal/@ @"cal_topcal_rx_core0cal_rx_core1 wportsport@0/endpointN^j3port@1/interconnect@48800000ti,dra7-l4-per3simple-bus(/HHHHHaplaia0ia1ia2 H segment@0 simple-bus  00@@PP``pp  00@@PP``pp  00@@PP``pp@@PP  00``pp @@PP  00target-module@2000ti,sysc-omap4ti,sysc/   revsysc  [bbfck  mailbox@0ti,omap4-mailbox/0{|}~Uas  disabledtarget-module@4000ti,sysc disabled @target-module@a000ti,sysc disabled target-module@10000ti,sysc disabled target-module@16000ti,sysc disabled `target-module@1c000ti,sysc disabled target-module@1e000ti,sysc disabled target-module@20000ti,sysc-omap4-timerti,sysc/ revsysc [bfck timer@0ti,omap5430-timer/[bfcktimer_sys_ck $3target-module@22000ti,sysc-omap4-timerti,sysc/   revsysc [bfck  timer@0ti,omap5430-timer/[bfcktimer_sys_ck %target-module@24000ti,sysc-omap4-timerti,sysc/@@ revsysc [bfck @timer@0ti,omap5430-timer/[bfcktimer_sys_ck &3target-module@26000ti,sysc-omap4-timerti,sysc/`` revsysc [ bfck `timer@0ti,omap5430-timer/[ bfcktimer_sys_ck '3target-module@28000ti,sysc-omap4-timerti,sysc/ revsysc [bfck timer@0ti,omap5430-timer/[bfcktimer_sys_ck Starget-module@2a000ti,sysc-omap4-timerti,sysc/ revsysc [bfck timer@0ti,omap5430-timer/[bfcktimer_sys_ck Ttarget-module@2c000ti,sysc-omap4-timerti,sysc/ revsysc [bfck timer@0ti,omap5430-timer/[bfcktimer_sys_ck Utarget-module@2e000ti,sysc-omap4-timerti,sysc/ revsysc [bfck timer@0ti,omap5430-timer/[bfcktimer_sys_ck Vtarget-module@38000ti,sysc-omap4-simpleti,sysc/tx revsysc [$bfck  disabledrtc@0ti,am3352-rtc/[O disabledtarget-module@3a000ti,sysc-omap4ti,sysc/ revsysc  [b(bfck mailbox@0ti,omap4-mailbox/0Uas  disabledtarget-module@3c000ti,sysc-omap4ti,sysc/ revsysc  [b0bfck mailbox@0ti,omap4-mailbox/0Uas  disabledtarget-module@3e000ti,sysc-omap4ti,sysc/ revsysc  [b8bfck mailbox@0ti,omap4-mailbox/0Uas  disabledtarget-module@40000ti,sysc-omap4ti,sysc/ revsysc  [b@bfck mailbox@0ti,omap4-mailbox/0Uas okay3mbox-ipu1-ipc3x  okay3mbox-dsp1-ipc3x  okay3target-module@42000ti,sysc-omap4ti,sysc/   revsysc  [bHbfck  mailbox@0ti,omap4-mailbox/0Uas okay3mbox-ipu2-ipc3x  okay3target-module@44000ti,sysc-omap4ti,sysc/@@ revsysc  [bPbfck @mailbox@0ti,omap4-mailbox/0Uas  disabledtarget-module@46000ti,sysc-omap4ti,sysc/`` revsysc  [bXbfck `mailbox@0ti,omap4-mailbox/0Uas  disabledtarget-module@48000ti,sysc disabled target-module@4a000ti,sysc disabled target-module@4c000ti,sysc disabled target-module@4e000ti,sysc disabled target-module@50000ti,sysc disabled target-module@52000ti,sysc disabled  target-module@54000ti,sysc disabled @target-module@56000ti,sysc disabled `target-module@58000ti,sysc disabled target-module@5a000ti,sysc disabled target-module@5c000ti,sysc disabled target-module@5e000ti,sysc-omap4ti,sysc/ revsysc  [b`bfck mailbox@0ti,omap4-mailbox/0    Uas  disabledtarget-module@60000ti,sysc-omap4ti,sysc/ revsysc  [bhbfck mailbox@0ti,omap4-mailbox/0 Uas  disabledtarget-module@62000ti,sysc-omap4ti,sysc/   revsysc  [bpbfck  mailbox@0ti,omap4-mailbox/0Uas  disabledtarget-module@64000ti,sysc-omap4ti,sysc/@@ revsysc  [bxbfck @mailbox@0ti,omap4-mailbox/0Uas  disabledtarget-module@80000ti,sysc-omap4ti,sysc/ revsysc [Ybfck omap_dwc3_1@0ti,dwc3/ H usb@10000 snps,dwc3/p$GGHperipheralhostotgusb2-phyusb3-phy super-speedotg target-module@c0000ti,sysc-omap4ti,sysc/   revsysc [Y bfck  omap_dwc3_2@0ti,dwc3/ W usb@10000 snps,dwc3/p$IIWperipheralhostotg usb2-phy high-speedhost  #target-module@100000ti,sysc-omap4ti,sysc/ revsysc [Y(bfck omap_dwc3_3@0ti,dwc3/ X  disabledusb@10000 snps,dwc3/p$XXXperipheralhostotg high-speedotg target-module@170000ti,sysc-omap4ti,sysc/sysc   [bfck  disabledtarget-module@190000ti,sysc-omap4ti,sysc/sysc   [bfck  disabledtarget-module@1b0000ti,sysc-omap4ti,sysc/ revsysc   [bfck  disabledtarget-module@1d0010ti,sysc-omap4ti,sysc/sysc   [bfck vpe@0 ti,dra7-vpe / Wvpe_topsccscvpdma baxi@0 simple-busQQ0 pcie@51000000/Q Q L rc_dbicsti_confconfig;pci0ف0 00 @ J Tpcie1 pcie-phy0 e^ x`  okayti,dra726-pcie-rcti,dra7-pcieinterrupt-controller 3pcie_ep@51000000 /Q(Q LQ(&ep_dbicsti_confep_dbics2addr_space  J  pcie1 pcie-phy0  e^ disabled"ti,dra726-pcie-epti,dra7-pcie-epaxi@1 simple-busQQ00 disabledpcie@51800000/Q Q L rc_dbicsti_confconfigcd;pci0ف0000 @ J Tpcie2 pcie-phy0 x`  ti,dra726-pcie-rcti,dra7-pcieinterrupt-controller 3ocmcram@40300000 mmio-sram/@0 @0sram-hs@0ti,secure-ram/ocmcram@40400000 disabled mmio-sram/@@ @@ocmcram@40500000 disabled mmio-sram/@P @Pbandgap@4a0021e00/J! J#, J#,J#