R8,(&netxeon,r89rockchip,rk3288& 7Netxeon R89aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV acpu@501cpuarm,cortex-a12'@5<rV acpu@502cpuarm,cortex-a12'@5<rV acpu@503cpuarm,cortex-a12'@5<rV acpu-opp-tableoperating-points-v2iaopp-126000000t{ opp-216000000t { opp-312000000t{ opp-408000000tQ{ opp-600000000t#F{ opp-696000000t)|{~opp-816000000t0,{B@opp-1008000000t<{opp-1200000000tG{opp-1416000000tTfr{Oopp-1512000000tZJ{ opp-1608000000t_"{pbus simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkadma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkaRreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24ma timerarm,armv7-timer0   n64timer@ff810000rockchip,rk3288-timer  H 5a  pclktimerdisplay-subsystemrockchip,display-subsystemK mmc@ff0c0000rockchip,rk3288-dw-mshcQр 5Drvbiuciuciu-driveciu-sample_  @jresetokayvdefault mmc@ff0d0000rockchip,rk3288-dw-mshcQр 5Eswbiuciuciu-driveciu-sample_ ! @jreset disabledmmc@ff0e0000rockchip,rk3288-dw-mshcQр 5Ftxbiuciuciu-driveciu-sample_ "@jreset disabledmmc@ff0f0000rockchip,rk3288-dw-mshcQр 5Guybiuciuciu-driveciu-sample_ #@jreset disabledsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW jsaradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default  disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault! disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault" disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault# disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault$okayserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7(5MUbaudclkapb_pclktxrxdefault%okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8(5NVbaudclkapb_pclktxrxdefault&okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9(5OWbaudclkapb_pclkdefault'okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :(5PXbaudclkapb_pclktxrxdefault(okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;(5QYbaudclkapb_pclk  txrxdefault)okaythermal-zonesreserve_thermal5KY*cpu_thermal5dKY*tripscpu_alert0ipupassivea+cpu_alert1i$upassivea,cpu_criti_u criticalcooling-mapsmap0+0map1,0gpu_thermal5dKY*tripsgpu_alert0ipupassivea-gpu_criti_u criticalcooling-mapsmap0- .tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk jtsadc-apbinitdefaultsleep/0/1sokaya*ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq185fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB jstmmacethokay$2/rgmii8input E3U k'B@4default50usb@ff500000 generic-ehciP 56usbokayusb@ff520000 generic-ohciR )56usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost7 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ 8 usb2-phyokayusb@ff5c0000 generic-ehci\ 5 disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Ldefault9okaypmic@40silergy,syr827@4VDD_CPUC,_ Pwp@:a pmic@41silergy,syr828A4VDD_GPUC,_ Pwp@:rtc@51haoyu,hym8563Qxin32k&;default<pmic@5aactive-semi,act8846Zdefault=>regulatorsREG14VCC_DDR_OwOREG24VCC_IO_2Zw2ZawREG34VDD_LOG_B@wB@REG44VCC_20_wREG5 4VCCIO_SD_2Zw2ZaREG6 4VDD10_LCD_B@wB@REG74VCC_WL_2Zw2ZREG84VCCA_33_2Zw2ZREG94VCC_LAN_2Zw2Za2REG104VDD_10_B@wB@REG114VCC_18_w@ww@aREG12 4VCC18_LCD_w@ww@i2c@ff660000rockchip,rk3288-i2cf =i2c5Ndefault? disabledpwm@ff680000rockchip,rk3288-pwmhdefault@5_pwmokaypwm@ff680010rockchip,rk3288-pwmhdefaultA5_pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultB5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultC5_pwm disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsapower-controller!rockchip,rk3288-power-controllerh aUpower-domain@9 5chgfdehilkj$ DEFGHIJKLpower-domain@11 5op MNpower-domain@12 5 Opower-domain@13 5 PQreboot-modesyscon-reboot-modeRB&RB4RB DRBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv1PHjk$]#gׄeрxhрxhasyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwa1edp-phyrockchip,rk3288-dp-phy5h24mr disabledaeio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320r 5]phyclk jphy-reseta8usb-phy@334r45^phyclk jphy-reseta6usb-phy@348rH5_phyclk jphy-reseta7watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif}5T mclkhclkRtx 6defaultS1 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s} 55Ri2s_clki2s_hclkRRtxrxdefaultT disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk jcrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkU ilm jcoreaxiahbvop@ff930000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vopU def jaxiahbdclkVokayporta endpoint@0Wahendpoint@1Xafendpoint@2Ya`endpoint@3Zaciommu@ff930300rockchip,iommu  vopb_mmu5 aclkifaceU okayaVvop@ff940000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vopU  jaxiahbdclk[okayporta endpoint@0\aiendpoint@1]agendpoint@2^aaendpoint@3_adiommu@ff940300rockchip,iommu  vopl_mmu5 aclkifaceU okaya[mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkU 1 disabledportsportendpoint@0`aYendpoint@1aa^lvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcbU 1 disabledportsport@0endpoint@0caZendpoint@1da_dp@ff970000rockchip,rk3288-dp@ b5icdppclkedpojdp1 disabledportsport@0endpoint@0faXendpoint@1ga]hdmi@ff980000rockchip,rk3288-dw-hdmi(}1 g5hmniahbisfrcecU okayportsportendpoint@0haWendpoint@1ia\video-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclkjU iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkifaceU ajiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5kU  disableda.gpu-opp-tableoperating-points-v2akopp-100000000t{~opp-200000000t {~opp-300000000t{B@opp-400000000tׄ{opp-600000000t#F{qos@ffaa0000syscon aPqos@ffaa0080syscon aQqos@ffad0000syscon aEqos@ffad0100syscon aFqos@ffad0180syscon aGqos@ffad0400syscon aHqos@ffad0480syscon aIqos@ffad0500syscon aDqos@ffad0800syscon aJqos@ffad0880syscon aKqos@ffad0900syscon aLqos@ffae0000syscon aOqos@ffaf0000syscon aMqos@ffaf0080syscon aNefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400%@ @ `   apinctrlrockchip,rk3288-pinctrl1gpio0@ff750000rockchip,gpio-banku Q5@6F%a;gpio1@ff780000rockchip,gpio-bankx R5A6F%gpio2@ff790000rockchip,gpio-banky S5B6F%gpio3@ff7a0000rockchip,gpio-bankz T5C6F%gpio4@ff7b0000rockchip,gpio-bank{ U5D6F%a3gpio5@ff7c0000rockchip,gpio-bank| V5E6F%gpio6@ff7d0000rockchip,gpio-bank} W5F6F%gpio7@ff7e0000rockchip,gpio-bank~ X5G6F%asgpio8@ff7f0000rockchip,gpio-bank Y5H6F%hdmihdmi-cec-c0Rlhdmi-cec-c7Rlhdmi-ddc Rllhdmi-ddc-unwedge Rmlpcfg-output-low`ampcfg-pull-upkanpcfg-pull-downxaopcfg-pull-nonealpcfg-pull-none-12ma apsuspendglobal-pwroffRlddrio-pwroffRlddr0-retentionRnddr1-retentionRnedpedp-hpdR oi2c0i2c0-xfer Rlla9i2c1i2c1-xfer Rlla!i2c2i2c2-xfer R l la?i2c3i2c3-xfer Rlla"i2c4i2c4-xfer Rlla#i2c5i2c5-xfer Rlla$i2s0i2s0-bus`RllllllaTlcdclcdc-ctl@Rllllabsdmmcsdmmc-clkRla sdmmc-cmdRnasdmmc-cdRnasdmmc-bus1Rnsdmmc-bus4@Rnnnnasdio0sdio0-bus1Rnsdio0-bus4@Rnnnnsdio0-cmdRnsdio0-clkRlsdio0-cdRnsdio0-wpRnsdio0-pwrRnsdio0-bkpwrRnsdio0-intRnsdio1sdio1-bus1Rnsdio1-bus4@Rnnnnsdio1-cdRnsdio1-wpRnsdio1-bkpwrRnsdio1-intRnsdio1-cmdRnsdio1-clkRlsdio1-pwrR nemmcemmc-clkRlemmc-cmdRnemmc-pwrR nemmc-bus1Rnemmc-bus4@Rnnnnemmc-bus8Rnnnnnnnnspi0spi0-clkR naspi0-cs0R naspi0-txRnaspi0-rxRnaspi0-cs1Rnspi1spi1-clkR naspi1-cs0R naspi1-rxRnaspi1-txRnaspi2spi2-cs1Rnspi2-clkRnaspi2-cs0Rna spi2-rxRnaspi2-txR nauart0uart0-xfer Rnla%uart0-ctsRnuart0-rtsRluart1uart1-xfer Rn la&uart1-ctsR nuart1-rtsR luart2uart2-xfer Rnla'uart3uart3-xfer Rnla(uart3-ctsR nuart3-rtsR luart4uart4-xfer Rnla)uart4-ctsR nuart4-rtsR ltsadcotp-pinR la/otp-outR la0pwm0pwm0-pinRla@pwm1pwm1-pinRlaApwm2pwm2-pinRlaBpwm3pwm3-pinRlaCgmacrgmii-pinsRllllpppplll pplla5rmii-pinsRllllllllllspdifspdif-txR laSpcfg-output-highaqact8846pmic-vselRma=pwr-holdRqa>buttonspwrbtnRnaririr-intRnatpmicpmic-intRna<usbhost-vbus-drvRlauotg-vbus-drvR lavmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmaca4gpio-keys gpio-keysdefaultrpower ;tGPIO Key Powerdir-receivergpio-ir-receiver sdefaulttvcc-host-regulatorregulator-fixed P;defaultu 4vcc_hostvcc-otg-regulatorregulator-fixed P; defaultv4vcc_otgsdmmc-regulatorregulator-fixed 4sdmmc-supply_2Zw2Z Ps wasys-regulatorregulator-fixed 4sys-supply_LK@wLK@a: #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supply#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplysystem-power-controller#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us