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disabledi2c@20056000(rockchip,rk3036-i2crockchip,rk3288-i2c ` i2cMdefault"okayNpmic@1brockchip,rk808& default#$5Vq^xin32krk808-clkout2d%p%|%%%%&''%'(regulatorsDCDC_REG1  q6pNvdd_armregulator-state-mem]DCDC_REG2  P6Nvdd_gpuregulator-state-memvB@DCDC_REG3 Nvcc_ddrregulator-state-memvDCDC_REG4 2Z62ZNvcc_io'regulator-state-memv2ZLDO_REG1 2Z62Z Nvccio_pmu(regulator-state-memv2ZLDO_REG2 2Z62ZNvcc_tpregulator-state-mem]LDO_REG3 B@6B@Nvdd_10regulator-state-memvB@LDO_REG4 w@6w@ Nvcc18_lcdregulator-state-memvw@LDO_REG5 w@62Z Nvccio_sdregulator-state-memv2ZLDO_REG6 w@6&%Nvout5regulator-state-memvw@LDO_REG7 w@6w@Nvcc_18&regulator-state-memvw@LDO_REG8 w@6w@ Nvcca_codecregulator-state-memvw@SWITCH_REG1 Nvcc_wlregulator-state-memvSWITCH_REG2 Nvcc_lcdregulator-state-memvi2c@2005a000(rockchip,rk3036-i2crockchip,rk3288-i2c  i2cNdefault)okayrt5616@1brt5616qmclk:serial@20060000&rockchip,rk3036-uartsnps,dw-apb-uart  Nn6MUbaudclkapb_pclkdefault *+,okayserial@20064000&rockchip,rk3036-uartsnps,dw-apb-uart @ Nn6NVbaudclkapb_pclkdefault- disabledserial@20068000&rockchip,rk3036-uartsnps,dw-apb-uart  Nn6OWbaudclkapb_pclkdefault.okayi2c@20072000(rockchip,rk3036-i2crockchip,rk3288-i2c   i2cLdefault/ disabledspi@20074000rockchip,rockchip-spi @ RAapb-pclkspi_pclk txrxdefault0123 disabledpinctrlrockchip,rk3036-pinctrlT gpio0@2007c000rockchip,gpio-bank  $@ 8gpio1@20080000rockchip,gpio-bank  %A gpio2@20084000rockchip,gpio-bank @ &B  pcfg_pull_default5pcfg-pull-none4pwm0pwm0-pin4pwm1pwm1-pin4pwm2pwm2-pin4 pwm3pwm3-pin4!sdmmcsdmmc-clk4sdmmc-cmd5sdmmc-cd5sdmmc-bus15sdmmc-bus4@5555sdmmc-pwr4sdiosdio-bus1 5sdio-bus4@ 5 5 55sdio-cmd5sdio-clk 4bt-wake-h57emmcemmc-clk4emmc-cmd5emmc-bus855555555emacemac-xfer 5 5555555 emac-mdio  55 i2c0i2c0-xfer 44/i2c1i2c1-xfer 44"i2c2i2c2-xfer 44)i2si2s-bus`555555hdmihdmi-ctl@4 4 4 4uart0uart0-xfer 54*uart0-cts5+uart0-rts4,uart1uart1-xfer 54-uart2uart2-xfer 54.spi-pinsspi-txd50spi-rxd51spi-clk52spi-cs053spi-cs15ledsled-ctl46pmicpmic-int5#sleepglobal-pwroff4$memory@60000000memory` gpio-leds gpio-ledswork  kylin:red:leddefault6sdio-pwrseqmmc-pwrseq-simpledefault7$88 soundsimple-audio-cardi2s-rockchip,rt5616-codecD4^MicrophoneMicrophone JackHeadphoneHeadphone JackkxMIC1Microphone JackMIC2Microphone JackMicrophone Jackmicbias1Headphone JackHPOLHeadphone JackHPORsimple-audio-card,cpu9simple-audio-card,codec:vsys-regulatorregulator-fixedNvcc_sysLK@6LK@ % #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2mshc0mshc1mshc2serial0serial1serial2spienable-methoddevice_typeregresetsoperating-pointsclock-latencyclocksphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclock-namesinterrupt-affinityportsarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsinterrupt-namesassigned-clocksassigned-clock-ratesstatusmali-supplyreset-namesiommusremote-endpoint#iommu-cellsinterrupt-controller#interrupt-cellsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,grfassigned-clock-parentsmax-speedphy-modepinctrl-namespinctrl-0phyphy-reset-gpiosphy-reset-durationmax-frequencyfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpcap-sdio-irqdefault-sample-phasekeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104dmasdma-namesmmc-ddr-1_8v#sound-dai-cells#reset-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#pwm-cellsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltreg-shiftreg-io-widthgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinslabelsimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssimple-audio-card,widgetssimple-audio-card,routingsound-dai