48(( O(\ ti,am5728-idkti,dra762ti,dra7&7TI AM5748 IDKchosen=/ocp/serial@48020000aliasesI/ocp/i2c@48070000N/ocp/i2c@48072000S/ocp/i2c@48060000X/ocp/i2c@4807a000]/ocp/i2c@4807c000b/ocp/serial@4806a000j/ocp/serial@4806c000r/ocp/serial@48020000z/ocp/serial@4806e000/ocp/serial@48066000/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@4ae3c000/ocp/can@48480000/ocp/spi@4b300000-/ocp/i2c@48070000/tps659038@58/tps659038_rtc/ocp/rtc@48838000timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&cpuscpu@0 cpuarm,cortex-a15,@GcpuSapcpu@1 cpuarm,cortex-a15,@GcpuSapopp-tableoperating-points-v2-ti-cpu{opp_nom-1000000000;, P0, P0opp_od-1176000000FV@ @@ @opp_high@1500000000Yh/v~v~socti,omap-inframpu ti,omap5-mpumpuocpti,dra7-l3-nocsimple-busЀl3_main_1l3_main_2 DE  l4@4a000000ti,dra7-l4-cfgsimple-bus J"scm@2000ti,dra7-scm-coresimple-bus   scm_conf@0sysconsimple-bus pbias_regulator@e00ti,pbias-dra7ti,pbias-omap{pbias_mmc_omap5pbias_mmc_omap5w@2Zclocksdss_deshdcp_clk@558.ti,gate-clock@ ;Xehrpwm0_tbclk@558.ti,gate-clock@ ;Xehrpwm1_tbclk@558.ti,gate-clock@ ;Xehrpwm2_tbclk@558.ti,gate-clock@ ;Xsys_32k_ck. ti,mux-clock@ ;Qdpll_gmac_h14x2_ctrl_ck@3fc.ti,divider-clock@ H?;S`pĴdpll_gmac_h14x2_ctrl_mux_ck@3fc. ti,mux-clock@;S`mcan_clk@3fc.ti,gate-clock@;pinmux@1400ti,dra7-padconfpinctrl-singleh ?mmc1_pins_default_no_clk_pu0TX\`dhmmc1_pins_default0TX\`dhmmc1_pins_hs0TX\`dhmmc1_pins_sdr500TX\`dhmmc1_pins_ddr500TX\`dhmmc2_pins_defaultPmmc2_pins_hs200Pmmc3_pins_default0|mmc4_pins_hs0dcan1_pins_defaultdcan1_pins_sleepscm_conf@1c04syscon scm_conf@1c24syscon$$dma-router@b78ti,dra7-dma-crossbar x 0dma-router@c78ti,dra7-dma-crossbar x| 0cm_core_aon@5000ti,dra7-cm-core-aonsimple-busP  P clocksatl_clkin0_ck.ti,dra7-atl-clock @atl_clkin1_ck.ti,dra7-atl-clock @atl_clkin2_ck.ti,dra7-atl-clock @atl_clkin3_ck.ti,dra7-atl-clock @hdmi_clkin_ck. fixed-clock<2mlb_clkin_ck. fixed-clock<mlbp_clkin_ck. fixed-clock<pciesref_acs_clk_ck. fixed-clock<Aref_clkin0_ck. fixed-clock<ref_clkin1_ck. fixed-clock<ref_clkin2_ck. fixed-clock<ref_clkin3_ck. fixed-clock<rmii_clk_ck. fixed-clock<sdvenc_clkin_ck. fixed-clock<secure_32k_clk_src_ck. fixed-clock<lsys_clk32_crystal_ck. fixed-clock< sys_clk32_pseudo_ck.fixed-factor-clock@LWb virt_12000000_ck. fixed-clock<Zvirt_13000000_ck. fixed-clock<]@virt_16800000_ck. fixed-clock<Y\virt_19200000_ck. fixed-clock<$]virt_20000000_ck. fixed-clock<1-[virt_26000000_ck. fixed-clock<^virt_27000000_ck. fixed-clock<_virt_38400000_ck. fixed-clock<I`sys_clkin2. fixed-clock<Xausb_otg_clkin_ck. fixed-clock<ivideo1_clkin_ck. fixed-clock<;video1_m2_clkin_ck. fixed-clock<1video2_clkin_ck. fixed-clock<<video2_m2_clkin_ck. fixed-clock<0dpll_abe_ck@1e0.ti,omap4-dpll-m4xen-clock@dpll_abe_x2_ck.ti,omap4-dpll-x2-clock@dpll_abe_m2x2_ck@1f0.ti,divider-clock@Hasabe_clk@108.ti,divider-clock@Hcdpll_abe_m2_ck@1f0.ti,divider-clock@Hasedpll_abe_m3x2_ck@1f4.ti,divider-clock@Hasdpll_core_byp_mux@12c. ti,mux-clock@;,dpll_core_ck@120.ti,omap4-dpll-core-clock@ $,(dpll_core_x2_ck.ti,omap4-dpll-x2-clock@dpll_core_h12x2_ck@13c.ti,divider-clock@H?a<smpu_dpll_hs_clk_div.fixed-factor-clock@LWdpll_mpu_ck@160.ti,omap5-mpu-dpll-clock@`dlhdpll_mpu_m2_ck@170.ti,divider-clock@Haps mpu_dclk_div.fixed-factor-clock@ LWpdsp_dpll_hs_clk_div.fixed-factor-clock@LW!dpll_dsp_byp_mux@240. ti,mux-clock@!;@"dpll_dsp_ck@234.ti,omap4-dpll-clock@"48@<`#p#F#dpll_dsp_m2_ck@244.ti,divider-clock@#HaDs`$p#F$iva_dpll_hs_clk_div.fixed-factor-clock@LW%dpll_iva_byp_mux@1ac. ti,mux-clock@%;&dpll_iva_ck@1a0.ti,omap4-dpll-clock@&`'pEp}@'dpll_iva_m2_ck@1b0.ti,divider-clock@'Has`(p%(iva_dclk.fixed-factor-clock@(LWrdpll_gpu_byp_mux@2e4. ti,mux-clock@;)dpll_gpu_ck@2d8.ti,omap4-dpll-clock@)`*pLy@*dpll_gpu_m2_ck@2e8.ti,divider-clock@*Has`+p_(k+dpll_core_m2_ck@130.ti,divider-clock@Ha0s,core_dpll_out_dclk_div.fixed-factor-clock@,LWtdpll_ddr_byp_mux@21c. ti,mux-clock@;-dpll_ddr_ck@210.ti,omap4-dpll-clock@-.dpll_ddr_m2_ck@220.ti,divider-clock@.Ha sfdpll_gmac_byp_mux@2b4. ti,mux-clock@;/dpll_gmac_ck@2a8.ti,omap4-dpll-clock@/dpll_gmac_m2_ck@2b8.ti,divider-clock@Hasgvideo2_dclk_div.fixed-factor-clock@0LWvvideo1_dclk_div.fixed-factor-clock@1LWwhdmi_dclk_div.fixed-factor-clock@2LWxper_dpll_hs_clk_div.fixed-factor-clock@LWDusb_dpll_hs_clk_div.fixed-factor-clock@LWHeve_dpll_hs_clk_div.fixed-factor-clock@LW3dpll_eve_byp_mux@290. ti,mux-clock@3;4dpll_eve_ck@284.ti,omap4-dpll-clock@45dpll_eve_m2_ck@294.ti,divider-clock@5Has6eve_dclk_div.fixed-factor-clock@6LWdpll_core_h13x2_ck@140.ti,divider-clock@H?a@sdpll_core_h14x2_ck@144.ti,divider-clock@H?aDsRdpll_core_h22x2_ck@154.ti,divider-clock@H?aTs=dpll_core_h23x2_ck@158.ti,divider-clock@H?aXsWdpll_core_h24x2_ck@15c.ti,divider-clock@H?a\sdpll_ddr_x2_ck.ti,omap4-dpll-x2-clock@.7dpll_ddr_h11x2_ck@228.ti,divider-clock@7H?a(sdpll_dsp_x2_ck.ti,omap4-dpll-x2-clock@#8dpll_dsp_m3x2_ck@248.ti,divider-clock@8HaHs`9pׄ9dpll_gmac_x2_ck.ti,omap4-dpll-x2-clock@ dpll_gmac_h11x2_ck@2c0.ti,divider-clock@ H?as:dpll_gmac_h12x2_ck@2c4.ti,divider-clock@ H?asdpll_gmac_h13x2_ck@2c8.ti,divider-clock@ H?asdpll_gmac_m3x2_ck@2bc.ti,divider-clock@ Hasgmii_m_clk_div.fixed-factor-clock@:LWhdmi_clk2_div.fixed-factor-clock@2LWhdmi_div_clk.fixed-factor-clock@2LWl3_iclk_div@100.ti,divider-clockH;@ l4_root_clk_div.fixed-factor-clock@ LW video1_clk2_div.fixed-factor-clock@;LWvideo1_div_clk.fixed-factor-clock@;LWvideo2_clk2_div.fixed-factor-clock@<LWvideo2_div_clk.fixed-factor-clock@<LWipu1_gfclk_mux@520. ti,mux-clock@=; `>=>dummy_ck. fixed-clock<clockdomainsmpu_cm@300 ti,omap4-cm clk@20 ti,clkctrl .ipu_cm@500 ti,omap4-cm clk@40 ti,clkctrl@D.rtc_cm@700 ti,omap4-cm clk@40 ti,clkctrl@.cm_core@8000ti,dra7-cm-coresimple-bus0 0clocksdpll_pcie_ref_ck@200.ti,omap4-dpll-clock@ ?dpll_pcie_ref_m2ldo_ck@210.ti,divider-clock@?Has@apll_pcie_in_clk_mux@4ae06118 ti,mux-clock@@A.;Bapll_pcie_ck@21c.ti,dra7-apll-clock@B? Coptfclk_pciephy_div@4a00821cti,divider-clock@C.;Hapll_pcie_clkvcoldo.fixed-factor-clock@CLWapll_pcie_clkvcoldo_div.fixed-factor-clock@CLWapll_pcie_m2_ck.fixed-factor-clock@CLWkdpll_per_byp_mux@14c. ti,mux-clock@D;LEdpll_per_ck@140.ti,omap4-dpll-clock@E@DLHFdpll_per_m2_ck@150.ti,divider-clock@FHaPsGfunc_96m_aon_dclk_div.fixed-factor-clock@GLWydpll_usb_byp_mux@18c. ti,mux-clock@H;Idpll_usb_ck@180.ti,omap4-dpll-j-type-clock@IJdpll_usb_m2_ck@190.ti,divider-clock@JHasNdpll_pcie_ref_m2_ck@210.ti,divider-clock@?Hasjdpll_per_x2_ck.ti,omap4-dpll-x2-clock@FKdpll_per_h11x2_ck@158.ti,divider-clock@KH?aXsLdpll_per_h12x2_ck@15c.ti,divider-clock@KH?a\sdpll_per_h13x2_ck@160.ti,divider-clock@KH?a`sdpll_per_h14x2_ck@164.ti,divider-clock@KH?adsSdpll_per_m2x2_ck@150.ti,divider-clock@KHaPsMdpll_usb_clkdcoldo.fixed-factor-clock@JLWPfunc_128m_clk.fixed-factor-clock@LLWfunc_12m_fclk.fixed-factor-clock@MLWfunc_24m_clk.fixed-factor-clock@GLWfunc_48m_fclk.fixed-factor-clock@MLWfunc_96m_fclk.fixed-factor-clock@MLWl3init_60m_fclk@104.ti,divider-clock@Nclkout2_clk@6b0.ti,gate-clock@O;l3init_960m_gfclk@6c0.ti,gate-clock@P;usb_phy1_always_on_clk32k@640.ti,gate-clock@Q;@usb_phy2_always_on_clk32k@688.ti,gate-clock@Q;usb_phy3_always_on_clk32k@698.ti,gate-clock@Q;gpu_core_gclk_mux@1220. ti,mux-clock @RS+; `T+Tgpu_hyd_gclk_mux@1220. ti,mux-clock @RS+; `U+Ul3instr_ts_gclk_div@e50.ti,divider-clock@V;P  vip1_gclk_mux@1020. ti,mux-clock@ W; vip2_gclk_mux@1028. ti,mux-clock@ W;(vip3_gclk_mux@1030. ti,mux-clock@ W;0clockdomainscoreaon_clkdmti,clockdomain@Jcoreaon_cm@600 ti,omap4-cm clk@20 ti,clkctrl .l3main1_cm@700 ti,omap4-cm clk@20 ti,clkctrl t.dma_cm@a00 ti,omap4-cm   clk@20 ti,clkctrl .emif_cm@b00 ti,omap4-cm   clk@20 ti,clkctrl .atl_cm@c00 ti,omap4-cm   clk@0 ti,clkctrl.l4cfg_cm@d00 ti,omap4-cm   clk@20 ti,clkctrl .l3instr_cm@e00 ti,omap4-cm clk@20 ti,clkctrl .dss_cm@1100 ti,omap4-cm clk@20 ti,clkctrl .l3init_cm@1300 ti,omap4-cm clk@20 ti,clkctrl .l4per_cm@1700 ti,omap4-cm clk@0 ti,clkctrl . `XhYXl4@4ae00000ti,dra7-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000ti,dra7-prmsimple-bus`0  `0clockssys_clkin1@110. ti,mux-clock@Z[\]^_`sabe_dpll_sys_clk_mux@118. ti,mux-clock@ababe_dpll_bypass_clk_mux@114. ti,mux-clock@bQabe_dpll_clk_mux@10c. ti,mux-clock@bQ abe_24m_fclk@11c.ti,divider-clock@Yaess_fclk@178.ti,divider-clock@cxHdabe_giclk_div@174.ti,divider-clock@dtHabe_lp_clk_div@1d8.ti,divider-clock@ abe_sys_clk_div@120.ti,divider-clock@ Hadc_gfclk_mux@1dc. ti,mux-clock @aQsys_clk1_dclk_div@1c8.ti,divider-clock@H@msys_clk2_dclk_div@1cc.ti,divider-clock@aH@nper_abe_x1_dclk_div@1bc.ti,divider-clock@eH@odsp_gclk_div@18c.ti,divider-clock@$H@qgpu_dclk@1a0.ti,divider-clock@+H@semif_phy_dclk_div@190.ti,divider-clock@fH@ugmac_250m_dclk_div@19c.ti,divider-clock@gH@hgmac_main_clk.fixed-factor-clock@hLWl3init_480m_dclk_div@1ac.ti,divider-clock@NH@zusb_otg_dclk_div@184.ti,divider-clock@iH@{sata_dclk_div@1c0.ti,divider-clock@H@|pcie2_dclk_div@1b8.ti,divider-clock@jH@}pcie_dclk_div@1b4.ti,divider-clock@kH@~emu_dclk_div@194.ti,divider-clock@H@secure_32k_dclk_div@1c4.ti,divider-clock@lH@clkoutmux0_clk_mux@158. ti,mux-clockX@mnopqrstuhvwxyz{|}~Xclkoutmux1_clk_mux@15c. ti,mux-clockX@mnopqrstuhvwxyz{|}~\clkoutmux2_clk_mux@160. ti,mux-clockX@mnopqrstuhvwxyz{|}~`Ocustefuse_sys_gfclk_div.fixed-factor-clock@LWeve_clk@180. ti,mux-clock@69hdmi_dpll_clk_mux@164. ti,mux-clock@admlb_clk@134.ti,divider-clock@H@4mlbp_clk@130.ti,divider-clock@H@0per_abe_x1_gfclk2_div@138.ti,divider-clock@eH@8timer_sys_clk_div@144.ti,divider-clock@DHvideo1_dpll_clk_mux@168. ti,mux-clock@ahvideo2_dpll_clk_mux@16c. ti,mux-clock@alwkupaon_iclk_mux@108. ti,mux-clock@Vclockdomainswkupaon_cm@1800 ti,omap4-cm clk@20 ti,clkctrl l.scm_conf@c000sysconaxi@0 simple-busQQ0 pcie@51000000Q Q L rc_dbicsti_confconfig pci0Ɂ0 00pcie1 pcie-phy0` "=okayti,dra746-pcie-rcti,dra7-pcie Dinterrupt-controllerpcie_ep@51000000 Q(Q LQ(&ep_dbicsti_confep_dbics2addr_space JYpcie1 pcie-phy0 " =disabled"ti,dra746-pcie-epti,dra7-pcie-epaxi@1 simple-busQQ00 =disabledpcie@51800000Q Q L rc_dbicsti_confconfigcd pci0Ɂ0000pcie2 pcie-phy0` "ti,dra746-pcie-rcti,dra7-pcieinterrupt-controllerocmcram@40300000 mmio-sram@0 @0sram-hs@0ti,secure-ramocmcram@40400000 =disabled mmio-sram@@ @@ocmcram@40500000 =disabled mmio-sram@P @Pbandgap@4a0021e00J! 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