8( T)isee,omap3-igep0020ti,omap36xxti,omap3 +!7IGEPv2 Rev. C (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8cpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+8Udefaultcpinmux_gpmc_pinsmpinmux_uart1_pinsmRLpinmux_uart3_pinsmnppinmux_mcbsp2_pins m pinmux_mmc1_pins0mpinmux_mmc2_pins0m(*,.02pinmux_i2c1_pinsmpinmux_i2c3_pinsmpinmux_twl4030_pinsmApinmux_tfp410_pinsmpinmux_dss_dpi_pinsmpinmux_uart2_pins mDFHJpinmux_smsc9221_pinsmpinmux_lbee1usjyc_pinsm68:scm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clock mcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+8pinmux_twl4030_vpins maes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockpsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock*5dpll3_m2x2_ckfixed-factor-clock*5dpll4_x2_ckfixed-factor-clock*5corex2_fckfixed-factor-clock*5 wkup_l4_ickfixed-factor-clock*5Ocorex2_d3_fckfixed-factor-clock *5corex2_d5_fckfixed-factor-clock *5clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockAvirt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock D 0dpll4_m2_ck@d48ti,divider-clock? H!dpll4_m2x2_mul_ckfixed-factor-clock!*5"dpll4_m2x2_ck@d00ti,hsdiv-gate-clock" ?#omap_96m_alwon_fckfixed-factor-clock#*5*dpll3_ck@d00ti,omap3-dpll-core-clock @ 0dpll3_m3_ck@1140ti,divider-clock@$dpll3_m3x2_mul_ckfixed-factor-clock$*5%dpll3_m3x2_ck@d00ti,hsdiv-gate-clock%  ?&emu_core_alwon_ckfixed-factor-clock&*5csys_altclk fixed-clock/mcbsp_clks fixed-clockdpll3_m2_ck@d40ti,divider-clock @core_ckfixed-factor-clock*5'dpll1_fck@940ti,divider-clock' @(dpll1_ck@904ti,omap3-dpll-clock(  $ @ 4dpll1_x2_ckfixed-factor-clock*5)dpll1_x2m2_ck@944ti,divider-clock) D=cm_96m_fckfixed-factor-clock**5+omap_96m_fck@d40 ti,mux-clock+ @Fdpll4_m3_ck@e40ti,divider-clock @,dpll4_m3x2_mul_ckfixed-factor-clock,*5-dpll4_m3x2_ck@d00ti,hsdiv-gate-clock- ?.omap_54m_fck@d40 ti,mux-clock./ @9cm_96m_d2_fckfixed-factor-clock+*50omap_48m_fck@d40 ti,mux-clock0/ @1omap_12m_fckfixed-factor-clock1*5Hdpll4_m4_ck@e40ti,divider-clock @2dpll4_m4x2_mul_ckti,fixed-factor-clock2Ucp3dpll4_m4x2_ck@d00ti,gate-clock3 ?pdpll4_m5_ck@f40ti,divider-clock?@4dpll4_m5x2_mul_ckti,fixed-factor-clock4Ucp5dpll4_m5x2_ck@d00ti,hsdiv-gate-clock5 ?pkdpll4_m6_ck@1140ti,divider-clock?@6dpll4_m6x2_mul_ckfixed-factor-clock6*57dpll4_m6x2_ck@d00ti,hsdiv-gate-clock7 ?8emu_per_alwon_ckfixed-factor-clock8*5dclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock' p:clkout2_src_mux_ck@d70ti,composite-mux-clock'+9 p;clkout2_src_ckti,composite-clock:;<sys_clkout2@d70ti,divider-clock<@ pmpu_ckfixed-factor-clock=*5>arm_fck@924ti,divider-clock> $emu_mpu_alwon_ckfixed-factor-clock>*5el3_ick@a40ti,divider-clock' @?l4_ick@a40ti,divider-clock? @@rm_ick@c40ti,divider-clock@ @gpt10_gate_fck@a00ti,composite-gate-clock  Bgpt10_mux_fck@a40ti,composite-mux-clockA @Cgpt10_fckti,composite-clockBCgpt11_gate_fck@a00ti,composite-gate-clock  Dgpt11_mux_fck@a40ti,composite-mux-clockA @Egpt11_fckti,composite-clockDEcore_96m_fckfixed-factor-clockF*5mmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock  mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock1*5Gmcspi4_fck@a00ti,wait-gate-clockG mcspi3_fck@a00ti,wait-gate-clockG mcspi2_fck@a00ti,wait-gate-clockG mcspi1_fck@a00ti,wait-gate-clockG uart2_fck@a00ti,wait-gate-clockG uart1_fck@a00ti,wait-gate-clockG  core_12m_fckfixed-factor-clockH*5Ihdq_fck@a00ti,wait-gate-clockI core_l3_ickfixed-factor-clock?*5Jsdrc_ick@a10ti,wait-gate-clockJ gpmc_fckfixed-factor-clockJ*5core_l4_ickfixed-factor-clock@*5Kmmchs2_ick@a10ti,omap3-interface-clockK mmchs1_ick@a10ti,omap3-interface-clockK hdq_ick@a10ti,omap3-interface-clockK mcspi4_ick@a10ti,omap3-interface-clockK mcspi3_ick@a10ti,omap3-interface-clockK mcspi2_ick@a10ti,omap3-interface-clockK mcspi1_ick@a10ti,omap3-interface-clockK i2c3_ick@a10ti,omap3-interface-clockK i2c2_ick@a10ti,omap3-interface-clockK i2c1_ick@a10ti,omap3-interface-clockK uart2_ick@a10ti,omap3-interface-clockK uart1_ick@a10ti,omap3-interface-clockK  gpt11_ick@a10ti,omap3-interface-clockK  gpt10_ick@a10ti,omap3-interface-clockK  mcbsp5_ick@a10ti,omap3-interface-clockK  mcbsp1_ick@a10ti,omap3-interface-clockK  omapctrl_ick@a10ti,omap3-interface-clockK dss_tv_fck@e00ti,gate-clock9dss_96m_fck@e00ti,gate-clockFdss2_alwon_fck@e00ti,gate-clockdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock Lgpt1_mux_fck@c40ti,composite-mux-clockA @Mgpt1_fckti,composite-clockLMaes2_ick@a10ti,omap3-interface-clockK wkup_32k_fckfixed-factor-clockA*5Ngpio1_dbck@c00ti,gate-clockN sha12_ick@a10ti,omap3-interface-clockK wdt2_fck@c00ti,wait-gate-clockN wdt2_ick@c10ti,omap3-interface-clockO wdt1_ick@c10ti,omap3-interface-clockO gpio1_ick@c10ti,omap3-interface-clockO omap_32ksync_ick@c10ti,omap3-interface-clockO gpt12_ick@c10ti,omap3-interface-clockO gpt1_ick@c10ti,omap3-interface-clockO per_96m_fckfixed-factor-clock**5 per_48m_fckfixed-factor-clock1*5Puart3_fck@1000ti,wait-gate-clockP gpt2_gate_fck@1000ti,composite-gate-clockQgpt2_mux_fck@1040ti,composite-mux-clockA@Rgpt2_fckti,composite-clockQRgpt3_gate_fck@1000ti,composite-gate-clockSgpt3_mux_fck@1040ti,composite-mux-clockA@Tgpt3_fckti,composite-clockSTgpt4_gate_fck@1000ti,composite-gate-clockUgpt4_mux_fck@1040ti,composite-mux-clockA@Vgpt4_fckti,composite-clockUVgpt5_gate_fck@1000ti,composite-gate-clockWgpt5_mux_fck@1040ti,composite-mux-clockA@Xgpt5_fckti,composite-clockWXgpt6_gate_fck@1000ti,composite-gate-clockYgpt6_mux_fck@1040ti,composite-mux-clockA@Zgpt6_fckti,composite-clockYZgpt7_gate_fck@1000ti,composite-gate-clock[gpt7_mux_fck@1040ti,composite-mux-clockA@\gpt7_fckti,composite-clock[\gpt8_gate_fck@1000ti,composite-gate-clock ]gpt8_mux_fck@1040ti,composite-mux-clockA@^gpt8_fckti,composite-clock]^gpt9_gate_fck@1000ti,composite-gate-clock _gpt9_mux_fck@1040ti,composite-mux-clockA@`gpt9_fckti,composite-clock_`per_32k_alwon_fckfixed-factor-clockA*5agpio6_dbck@1000ti,gate-clockagpio5_dbck@1000ti,gate-clockagpio4_dbck@1000ti,gate-clockagpio3_dbck@1000ti,gate-clockagpio2_dbck@1000ti,gate-clocka wdt3_fck@1000ti,wait-gate-clocka per_l4_ickfixed-factor-clock@*5bgpio6_ick@1010ti,omap3-interface-clockbgpio5_ick@1010ti,omap3-interface-clockbgpio4_ick@1010ti,omap3-interface-clockbgpio3_ick@1010ti,omap3-interface-clockbgpio2_ick@1010ti,omap3-interface-clockb wdt3_ick@1010ti,omap3-interface-clockb uart3_ick@1010ti,omap3-interface-clockb uart4_ick@1010ti,omap3-interface-clockbgpt9_ick@1010ti,omap3-interface-clockb gpt8_ick@1010ti,omap3-interface-clockb gpt7_ick@1010ti,omap3-interface-clockbgpt6_ick@1010ti,omap3-interface-clockbgpt5_ick@1010ti,omap3-interface-clockbgpt4_ick@1010ti,omap3-interface-clockbgpt3_ick@1010ti,omap3-interface-clockbgpt2_ick@1010ti,omap3-interface-clockbmcbsp2_ick@1010ti,omap3-interface-clockbmcbsp3_ick@1010ti,omap3-interface-clockbmcbsp4_ick@1010ti,omap3-interface-clockbmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clockcde@femu_src_ckti,clkdm-gate-clockfgpclk_fck@1140ti,divider-clockg@pclkx2_fck@1140ti,divider-clockg@atclk_fck@1140ti,divider-clockg@traceclk_src_fck@1140 ti,mux-clockcde@htraceclk_fck@1140ti,divider-clockh @secure_32k_fck fixed-clockigpt12_fckfixed-factor-clocki*5wdt1_fckfixed-factor-clocki*5security_l4_ick2fixed-factor-clock@*5jaes1_ick@a14ti,omap3-interface-clockj rng_ick@a14ti,omap3-interface-clockj sha11_ick@a14ti,omap3-interface-clockj des1_ick@a14ti,omap3-interface-clockj cam_mclk@f00ti,gate-clockkpcam_ick@f10!ti,omap3-no-wait-interface-clock@csi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clock?*5lpka_ick@a14ti,omap3-interface-clockl icr_ick@a10ti,omap3-interface-clockK des2_ick@a10ti,omap3-interface-clockK mspro_ick@a10ti,omap3-interface-clockK mailboxes_ick@a10ti,omap3-interface-clockK ssi_l4_ickfixed-factor-clock@*5ssr1_fck@c00ti,wait-gate-clock sr2_fck@c00ti,wait-gate-clock sr_l4_ickfixed-factor-clock@*5dpll2_fck@40ti,divider-clock'@mdpll2_ck@4ti,omap3-dpll-clockm$@4ndpll2_m2_ck@44ti,divider-clocknDoiva2_ck@0ti,wait-gate-clockomodem_fck@a00ti,omap3-interface-clock sad2d_ick@a10ti,omap3-interface-clock? mad2d_ick@a18ti,omap3-interface-clock? mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock  pssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock  @$qssi_ssr_fck_3430es2ti,composite-clockpqrssi_sst_fck_3430es2fixed-factor-clockr*5 hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockJ ssi_ick_3430es2@a10ti,omap3-ssi-interface-clocks  usim_gate_fck@c00ti,composite-gate-clockF  ~sys_d2_ckfixed-factor-clock*5uomap_96m_d2_fckfixed-factor-clockF*5vomap_96m_d4_fckfixed-factor-clockF*5womap_96m_d8_fckfixed-factor-clockF*5xomap_96m_d10_fckfixed-factor-clockF*5 ydpll5_m2_d4_ckfixed-factor-clockt*5zdpll5_m2_d8_ckfixed-factor-clockt*5{dpll5_m2_d16_ckfixed-factor-clockt*5|dpll5_m2_d20_ckfixed-factor-clockt*5}usim_mux_fck@c40ti,composite-mux-clock(uvwxyz{|} @usim_fckti,composite-clock~usim_ick@c10ti,omap3-interface-clockO  dpll5_ck@d04ti,omap3-dpll-clock  $ L 4dpll5_m2_ck@d50ti,divider-clock Ptsgx_gate_fck@b00ti,composite-gate-clock' core_d3_ckfixed-factor-clock'*5core_d4_ckfixed-factor-clock'*5core_d6_ckfixed-factor-clock'*5omap_192m_alwon_fckfixed-factor-clock#*5core_d2_ckfixed-factor-clock'*5sgx_mux_fck@b40ti,composite-mux-clock + @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock? cpefuse_fck@a08ti,gate-clock ts_fck@a08ti,gate-clockA usbtll_fck@a08ti,wait-gate-clockt usbtll_ick@a18ti,omap3-interface-clockK mmchs3_ick@a10ti,omap3-interface-clockK mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockpdss_ick_3430es2@e10ti,omap3-dss-interface-clock@usbhost_120m_fck@1400ti,gate-clocktusbhost_48m_fck@1400ti,dss-gate-clock1usbhost_ick@1410ti,omap3-dss-interface-clock@uart4_fck@1000ti,wait-gate-clockPclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomaingdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainnd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmagpio@48310000ti,omap3-gpioH1gpio1 gpio@49050000ti,omap3-gpioIgpio2 gpio@49052000ti,omap3-gpioI gpio3 gpio@49054000ti,omap3-gpioI@ gpio4 gpio@49056000ti,omap3-gpioI`!gpio5 gpio@49058000ti,omap3-gpioI"gpio6 serial@4806a000ti,omap3-uartH &H12txrxuart1lUdefaultcserial@4806c000ti,omap3-uartH&I34txrxuart2lUdefaultcserial@49020000ti,omap3-uartI&J56txrxuart3lUdefaultci2c@48070000 ti,omap3-i2cH8txrx+i2c1Udefaultc'@twl@48H  ti,twl4030Udefaultcaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci :H Tvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@ vdds_dsiregulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio etwl4030-usbti,twl4030-usb qpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madci2c@48072000 ti,omap3-i2cH 9txrx+i2c2i2c@48060000 ti,omap3-i2cH=txrx+i2c3Udefaultceeprom@50 ti,eepromPmailbox@48094000ti,omap3-mailboxmailboxH @ dsp  *spi@48098000ti,omap2-mcspiH A+mcspi15@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi25 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi35 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi45FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1C=>txrxPUdefaultc]iy  mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxUdefaultc]ymmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp mmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokayUdefaultcmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1 timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8(timer@49040000ti,omap3430-timerI-timer9(timer@48086000ti,omap3430-timerH`.timer10(timer@48088000ti,omap3430-timerH/timer11(timer@48304000ti,omap3430-timerH0@_timer12 5usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ Eehci-phyohci@48064400ti,ohci-omap3HDLPehci@48064800 ti,ehci-omapHHMhgpmc@6e000000ti,omap3430-gpmcgpmcnrxtxmy+ Udefaultc 0,nand@0,0ti,omap2-nand  micron,mt29c4g96mazbch8,,"0,C(R6a@pRR(+okayonenand@0,0ti,omap2-onenand  `` 0 0R`>C`prraZL f}Z.+ disabledethernet@gpmcsmsc,lan9221smsc,lan9115*$ 0 0R*>C$p<6a$Lf}*#0Udefaultc  usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hsFQY bqh yusb2-phy2dss@48050000 ti,omap3-dssHok dss_corefck+dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfcktv_dac_clkportendpoint ssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ r   ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-address`sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+8Udefaultc pinmux_hsusbb1_pins`m:8L N < > @ B D F H J  pinmux_leds_pinsmTVXpinmux_mmc1_cd_pinsmZisp@480bc000 ti,omap3-ispH H  ports+bandgap@48002524H%$ti,omap36xx-bandgaptarget-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8sysc  fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8sysc  fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivathermal-zonescpu_thermal . D RN  _memory@80000000memory soundti,omap-twl4030 oigep2 xregulator-vdd33regulator-fixedvdd33 regulator-vddvarioregulator-fixed vddvario regulator-vdd33aregulator-fixedvdd33a ledsUdefaultc gpio-ledsboot omap3:green:boot  onuser0 omap3:red:user0  offuser1 omap3:red:user1  offuser2 omap3:green:user1 hsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z  phsusb1_phyusb-nop-xceiv  encoder ti,tfp410  ports+port@0endpoint port@1endpointconnectordvi-connector dvi  portendpointfixedregulator-mmcsdioregulator-fixedvmmcsdio_fixed2Z2Zmmc2_pwrseqmmc-pwrseq-simple    compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpioswp-gpiosmmc-pwrseqnon-removablestatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-wrapgpmc,burst-readgpmc,burst-writegpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,sysc-maskti,sysc-sidlepolling-delay-passivepolling-delaycoefficientsthermal-sensorsti,modelti,mcbspregulator-always-onlabeldefault-stategpiostartup-delay-usreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus