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B_z prf_reset_cfg_func.ptB_zpgpio@f8011000arm,pl061arm,primecell 4} apb_pclkOPWR_HOLDDSI_SELUSB_HUB_RESET_NUSB_SELHDMI_PDWL_REG_ONPWRON_DET5V_HUB_EN5gpio@f8012000arm,pl061arm,primecell  5} apb_pclk:SD_DETHDMI_INTPMU_IRQ_NWL_HOST_WAKENCNCNCBT_REG_ONgpio@f8013000arm,pl061arm,primecell0 6} apb_pclkBGPIO-AGPIO-BGPIO-CGPIO-DGPIO-EUSB_ID_DETUSB_VBUS_DETGPIO-Hgpio@f8014000arm,pl061arm,primecell@ 7+P} apb_pclk%GPIO3_0NCNCNCWLAN_ACTIVENCNCugpio@f7020000arm,pl061arm,primecell 8+X} apb_pclk?USER_LED1USER_LED2USER_LED3USER_LED4SD_SELNCNCBT_ACTIVEtgpio@f7021000arm,pl061arm,primecell 9+`} apb_pclk?NCNC[UART1_RxD][UART1_TxD][AUX_SSI1]NC[PCM_CLK][PCM_FS]gpio@f7022000arm,pl061arm,primecell  :+h} apb_pclk=[SPI0_DIN][SPI0_DOUT][SPI0_CS][SPI0_SCLK]NCNCNCGPIO-G.gpio@f7023000arm,pl061arm,primecell0 ;+p} apb_pclk$NCNCNCNC[PCM_DI][PCM_DO]NCNCgpio@f7024000arm,pl061arm,primecell@ < +x+} apb_pclkNC[CEC_CLK_19_2MHZ]NCgpio@f7025000arm,pl061arm,primecellP =+} apb_pclk'GPIO-JGPIO-LNCNCNCNC[ISP_CCLK0]gpio@f7026000arm,pl061arm,primecell` > ++} apb_pclk?BOOT_SEL[ISP_CCLK1]GPIO-IGPIO-KNCNC[I2C2_SDA][I2C2_SCL]gpio@f7027000arm,pl061arm,primecellp ? ++} apb_pclk"[I2C3_SDA][I2C3_SCL]NCNCNCgpio@f7028000arm,pl061arm,primecell @ +!++} apb_pclk8[BT_PCM_XFS][BT_PCM_DI][BT_PCM_DO]NCNCNCNCGPIO-Fgpio@f7029000arm,pl061arm,primecell A+0} apb_pclkh[UART0_RX][UART0_TX][BT_UART1_CTS][BT_UART1_RTS][BT_UART1_RX][BT_UART1_TX][UART0_CTS][UART0_RTS]gpio@f702a000arm,pl061arm,primecell B+8} apb_pclkZ[UART0_RxD][UART0_TxD][I2C0_SCL][I2C0_SDA][I2C1_SCL][I2C1_SDA][I2C2_SCL][I2C2_SDA]gpio@f702b000arm,pl061arm,primecell C0+J+z+~} apb_pclk NCgpio@f702c000arm,pl061arm,primecell D+} apb_pclkgpio@f702d000arm,pl061arm,primecell E+} apb_pclkgpio@f702e000arm,pl061arm,primecell F+} apb_pclkgpio@f702f000arm,pl061arm,primecell G+} apb_pclkspi@f7106000arm,pl022arm,primecell` 2 apb_pclkdefault,- .oki2c@f7100000snps,designware-i2c , ,default/0oki2c@f7101000snps,designware-i2c -,default12oki2c@f7102000snps,designware-i2c  .,default34ok+adv7533@39 adi,adv75339  5ports+port@0endpoint.6Wport@2endpoint.7Pusbphyhisilicon,hi6220-usb-phy>I8T9usb@f72c0000hisilicon,hi6220-usb,p9 uusb2-phyotgotg< Mmailbox@f7510000hisilicon,hi6220-mbox Q ^dwmmc0@f723d000hisilicon,hi6220-dw-mshc# Hciubiuresetdefault:;<=>dwmmc1@f723e000hisilicon,hi6220-dw-mshcT# I+ciubiureset defaultidle ?@A BCD%7HUboEF| dwmmc2@f723f000hisilicon,hi6220-dw-mshc# Jciubiureset defaultidle GHI JKLMN+wlcore@2 ti,wl1835 watchdog@f8005000arm,sp805-wdtarm,primecellP   apb_pclktsensor@0,f7030700hisilicon,tsensor  thermal_clkQi2s@f7118000hisilicon,hi6210-i2s { 8dacodeci2s-baseOOrxtxportsport@0vendpoint.Pi2s7thermal-zonescls0d -Qtripstrip-point@0=Ipassivetrip-point@1=$IpassiveRcooling-mapsmap0TR Yade@f4100000hisilicon,hi6220-adex hade_baserST sTTT(clk_ade_coreclk_codec_jpegclk_ade_pix&TT6u**okportendpoint.UVdsi@f4107800hisilicon,hi6220-dsixTpclkokports+port@0endpoint.VUport@1endpoint@0.W6debug@f6590000&arm,coresight-cpu-debugarm,primecellY; apb_pclkDdebug@f6592000&arm,coresight-cpu-debugarm,primecellY ; apb_pclkDdebug@f6594000&arm,coresight-cpu-debugarm,primecellY@; apb_pclkDdebug@f6596000&arm,coresight-cpu-debugarm,primecellY`; apb_pclkDdebug@f65d0000&arm,coresight-cpu-debugarm,primecell]; apb_pclkDdebug@f65d2000&arm,coresight-cpu-debugarm,primecell] ; apb_pclkDdebug@f65d4000&arm,coresight-cpu-debugarm,primecell]@; apb_pclkDdebug@f65d6000&arm,coresight-cpu-debugarm,primecell]`; apb_pclkD funnel@f6401000#arm,coresight-funnelarm,primecell@X apb_pclkports+port@0endpoint.Y[port@1endpoint.Zbetf@f6402000 arm,coresight-tmcarm,primecell@ X apb_pclkports+port@0endpoint.[Yport@1endpoint.\]replicatorarm,coresight-replicatorX apb_pclkports+port@0endpoint.]\port@1endpoint.^`port@2endpoint._aetr@f6404000 arm,coresight-tmcarm,primecell@@X apb_pclkports+port@0endpoint.`^tpiu@f6405000!arm,coresight-tpiuarm,primecell@PX apb_pclkports+port@0endpoint.a_funnel@f6501000#arm,coresight-funnelarm,primecellPX apb_pclkports+port@0endpoint.bZport@1endpoint.ckport@2endpoint.dlport@3endpoint.emport@4endpoint.fnport@5endpoint.goport@6endpoint.hpport@7endpoint.iqport@8endpoint.jretm@f659c000"arm,coresight-etm4xarm,primecellYX apb_pclkDportendpoint.kcetm@f659d000"arm,coresight-etm4xarm,primecellYX apb_pclkDportendpoint.ldetm@f659e000"arm,coresight-etm4xarm,primecellYX apb_pclkDportendpoint.meetm@f659f000"arm,coresight-etm4xarm,primecellYX apb_pclkDportendpoint.nfetm@f65dc000"arm,coresight-etm4xarm,primecell]X apb_pclkDportendpoint.ogetm@f65dd000"arm,coresight-etm4xarm,primecell]X apb_pclkDportendpoint.phetm@f65de000"arm,coresight-etm4xarm,primecell]X apb_pclkDportendpoint.qietm@f65df000"arm,coresight-etm4xarm,primecell]X apb_pclkD portendpoint.rjaliases/soc/uart@f8015000/soc/uart@f7111000/soc/uart@f7112000/soc/uart@f7113000chosenserial3:115200n8memory@0memory` `A"reserved-memory+ramoops@21f00000ramoops!linux,cmashared-dma-poolreboot-mode-syscon@5f01000sysconsimple-mfdreboot-modesyscon-reboot-mode wfUwfU.wfUregulator@0regulator-fixedLDO21