7983(3`  ,OrangePi 3'2xunlong,orangepi-3allwinner,sun50i-h6cpus cpu@02arm,cortex-a53=cpuIMpsci[cpu@12arm,cortex-a53=cpuIMpscicpu@22arm,cortex-a53=cpuIMpscicpu@32arm,cortex-a53=cpuIMpscidisplay-engine#2allwinner,sun50i-h6-display-enginef zdisabledinternal-osc-clk 2fixed-clock$iosc osc24M_clk 2fixed-clockn6osc24M osc32k_clk 2fixed-clockosc32k psci 2arm,psci-0.2Tsmctimer2arm,armv8-timer0   soc 2simple-bus bus@100000012allwinner,sun50i-h6-de3allwinner,sun50i-a64-de2I@  @clock@02allwinner,sun50i-h6-de3-clkImodbusmixer@100000 2allwinner,sun50i-h6-de3-mixer-0Ibusmodports port@1Iendpointvideo-codec@1c0e000!2allwinner,sun50i-h6-video-engineI &%6 ahbmodram Ysyscon@3000000G2allwinner,sun50i-h6-system-controlallwinner,sun50i-a64-system-controlI sram@28000 2mmio-sramI  sram-section@072allwinner,sun50i-h6-sram-callwinner,sun50i-a64-sram-cIsram@1a00000 2mmio-sramI    sram-section@082allwinner,sun50i-h6-sram-c1allwinner,sun4i-a10-sram-c1I clock@30010002allwinner,sun50i-h6-ccuI hoscloscioscdma-controller@30020002allwinner,sun50i-h6-dmaI  ++5 busmbus -.:sid@30060002allwinner,sun50i-h6-sidI`watchdog@30090a002allwinner,sun50i-h6-wdtallwinner,sun6i-a31-wdtI  2 zdisabledpinctrl@300b0002allwinner,sun50i-h6-pinctrlI0356; apbhoscloscEUav  rgmii-pinsBPD0PD1PD2PD3PD4PD5PD7PD8PD9PD10PD11PD12PD13PD19PD20emac(hdmi-pins PH8PH9PH10hdmimmc0-pinsPF0PF1PF2PF3PF4PF5mmc0mmc1-pinsPG0PG1PG2PG3PG4PG5mmc1mmc2-pins5PC1PC4PC5PC6PC7PC8PC9PC10PC11PC12PC13PC14mmc2uart0-ph-pinsPH0PH1uart0interrupt-controller@3021000 2arm,gic-400 I @ `   avmmc@402000012allwinner,sun50i-h6-mmcallwinner,sun50i-a64-mmcIC@ahbmmcahb #defaultzokay  mmc@402100012allwinner,sun50i-h6-mmcallwinner,sun50i-a64-mmcIDAahbmmcahb $default zdisabled mmc@402200032allwinner,sun50i-h6-emmcallwinner,sun50i-a64-emmcI EBahbmmcahb %default zdisabled serial@50000002snps,dw-apb-uartI Fzokaydefaultserial@50004002snps,dw-apb-uartI G zdisabledserial@50008002snps,dw-apb-uartI H zdisabledserial@5000c002snps,dw-apb-uartI  I zdisabledethernet@502000032allwinner,sun50i-h6-emacallwinner,sun50i-a64-emac'I .macirq! stmmacethT stmmaceth zdisabledmdio2snps,dwmac-mdio usb@510000022allwinner,sun50i-h6-musballwinner,sun8i-a33-musbIt5 .mc>CusbMzokayThostphy@51004002allwinner,sun50i-h6-usb-phyI$1\phy_ctrlpmu0pmu3ilusb0_phyusb3_phy,.usb0_resetusb3_resetzokayfqusb@5101000&2allwinner,sun50i-h6-ehcigeneric-ehciI oqh02zokayusb@5101400&2allwinner,sun50i-h6-ohcigeneric-ohciI oh0zokayusb@5311000&2allwinner,sun50i-h6-ehcigeneric-ehciI1 psk14>zokayusb@5311400&2allwinner,sun50i-h6-ohcigeneric-ohciI1 pk1>zokayhdmi@60000002allwinner,sun50i-h6-dw-hdmiI @0~|{}!iahbisfrtmdscechdcphdcp-bus9> ctrlhdcp> Chdmi-phydefault zdisabledports port@0Iendpointport@1Ihdmi-phy@60100002allwinner,sun50i-h6-hdmi-phyI~|busmod8phyftcon-top@65100002allwinner,sun50i-h6-tcon-topIQ bustcon-tv0 tcon-top-tv0:rstports port@0 Iendpoint@0Iport@1 Iendpoint@2Iport@4 Iendpoint@0Iport@5Iendpointlcd-controller@651500082allwinner,sun50i-h6-tcon-tvallwinner,sun8i-r40-tcon-tvIQP B ahbtcon-ch1<lcdports port@0Iendpointport@1 Iendpoint@1Iclock@70100002allwinner,sun50i-h6-r-ccuI hoscloscioscpll-periph watchdog@702040002allwinner,sun50i-h6-wdtallwinner,sun6i-a31-wdtI  ginterrupt-controller@702100062allwinner,sun50i-h6-r-intcallwinner,sun6i-a31-r-intcavI `"pinctrl@70220002allwinner,sun50i-h6-r-pinctrlI io  apbhoscloscEUav#r-i2c-pinsPL0PL1s_i2c!i2c@70814002allwinner,sun6i-a31-i2cI k  default!zokay pmic@36 2x-powers,axp805x-powers,axp806I6"av regulatorsaldo1&:2ZR2Zjvcc-pl-led-iraldo2:2ZR2Zjvcc33-audio-tv-ephy-macaldo3&:2ZR2Zjvcc33-io-pd-emmc-sd-usb-uart-1bldo1&:w@Rw@jvcc18-dram-bias-pllbldo2&:w@Rw@jvcc-efuse-pcie-hdmi-pc bldo3bldo4cldo1&:2ZR2Zjvcc33-io-pd-emmc-sd-usb-uart-2 cldo2cldo3dcdca&: 5R@jvdd-cpudcdcc: \Rzjvdd-gpudcdcd&:Rjvdd-sysdcdce&:ORO jvcc-dramswaliasesy/soc/serial@5000000chosenserial0:115200n8leds 2gpio-ledspowerorangepi:red:power#onstatusorangepi:green:status#vcc5v2regulator-fixedjvcc-5v:LK@RLK@& interrupt-parent#address-cells#size-cellsmodelcompatibledevice_typeregenable-methodcpu-supplyallwinner,pipelinesstatus#clock-cellsclock-frequencyclock-accuracyclock-output-namesphandleinterruptsrangesallwinner,sramclocksclock-namesresets#reset-cellsremote-endpointdma-channelsdma-requests#dma-cellsgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsvcc-pc-supplyvcc-pd-supplypinsfunctiondrive-strengthbias-pull-upreset-namespinctrl-namespinctrl-0vmmc-supplycd-gpiosbus-widthreg-shiftreg-io-widthsysconinterrupt-namesphysphy-namesextcondr_modereg-names#phy-cellsusb0_id_det-gpiosusb0_vbus-supplyusb3_vbus-supplyx-powers,self-working-modevina-supplyvinb-supplyvinc-supplyvind-supplyvine-supplyaldoin-supplybldoin-supplycldoin-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-nameserial0stdout-pathlabeldefault-state