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2arm,gic-400  @ `  B  pwm@1c2140012allwinner,sun50i-a64-pwmallwinner,sun5i-a13-pwmc%GdefaultU9 jdisableddram-controller@1c620002allwinner,sun50i-a64-mbus cp  @=csi@1cb00002allwinner,sun50i-a64-csi BTc2h` busmodramGdefaultU: jdisableddsi@1ca00002allwinner,sun50i-a64-mipi-dsi BYc;dphy jdisabled portendpoint<d-phy@1ca1000=2allwinner,sun50i-a64-mipi-dphyallwinner,sun6i-a31-mipi-dphycqbusmod jdisabled;deinterlace@1e00000@2allwinner,sun50i-a64-deinterlaceallwinner,sun8i-h3-deinterlacec1fa busmodram B]= dma-memhdmi@1ee0000:2allwinner,sun50i-a64-dw-hdmiallwinner,sun8i-a83t-dw-hdmi BXc3oniahbisfrtmdsctrl>phyjokay&ports port@0endpoint?port@1endpoint@Hhdmi-phy@1ef00002allwinner,sun50i-a64-hdmi-phyc3obusmodpll-0phy>rtc@1f0000002allwinner,sun50i-a64-rtcallwinner,sun8i-h3-rtcB()/osc32kosc32k-outiosccA&interrupt-controller@1f00c0072allwinner,sun50i-a64-r-intcallwinner,sun6i-a31-r-intc   B Gclock@1f014002allwinner,sun50i-a64-r-ccuc%&& hoscloscioscpll-periphCcodec-analog@1f015c0"2allwinner,sun50i-a64-codec-analogjokay2Bi2c@1f0240012allwinner,sun50i-a64-i2callwinner,sun6i-a31-i2c$ B,cC C jdisabled ir@1f02000/2allwinner,sun50i-a64-irallwinner,sun6i-a31-ir cCC apbirC B%GdefaultUD jdisabledpwm@1f0380012allwinner,sun50i-a64-pwmallwinner,sun5i-a13-pwm8c%GdefaultUE jdisabledpinctrl@1f02c002allwinner,sun50i-a64-r-pinctrl, B-cC%Aapbhosclosc r-i2c-pl89-pinsPL8PL9s_i2cr-ir-rx-pinPL11 s_cir_rxDr-pwm-pinPL10s_pwmEr-rsb-pinsPL0PL1s_rsbFrsb@1f034002allwinner,sun8i-a23-rsb4 B'cC-CGdefaultUFjokay pmic@3a32x-powers,axp803GB ac-power-supply@2x-powers,axp803-ac-power-supplyx-powers,axp813-ac-power-supplyjokayadc(2x-powers,axp803-adcx-powers,axp813-adc?gpio*2x-powers,axp803-gpiox-powers,axp813-gpiogpio0-ldoGPIO0ldogpio1-ldoGPIO1ldobattery-power-supplyJ2x-powers,axp803-battery-power-supplyx-powers,axp813-battery-power-supplyjokayregulatorsQ aldo1daldo1aldo2dvcc-plsw@2Zaldo3 dvcc-pll-avccs--dc1swdvcc-phy8dcdc1dvcc-3v3s2Z2Z"dcdc2 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interrupt-parent#address-cells#size-cellsmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusvcc-hdmi-supplydevice_typeregenable-methodnext-level-cacheclock-names#cooling-cellsoperating-points-v2cpu-supplyphandlecache-levelallwinner,pipelines#clock-cellsclock-frequencyclock-output-namesinterruptsinterrupt-affinitysimple-audio-card,namesimple-audio-card,formatsimple-audio-card,frame-mastersimple-audio-card,bitclock-mastersimple-audio-card,mclk-fssimple-audio-card,aux-devssimple-audio-card,routingsimple-audio-card,widgetssound-daiallwinner,erratum-unknown1polling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisallwinner,sramresets#reset-cellsremote-endpointdma-channelsdma-requests#dma-cellsreset-namesallwinner,tcon-channelmax-frequencypinctrl-namespinctrl-0vmmc-supplycd-gpiosdisable-wpbus-width#mbox-cellsinterrupt-namesphysphy-namesextcondr_modereg-names#phy-cellsgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellspinsfunctionbias-pull-updrive-strength#sound-dai-cellsdmasdma-namesnvmem-cellsnvmem-cell-names#thermal-sensor-cellsreg-shiftreg-io-widthnum-cssysconphy-modephy-handlephy-supply#pwm-cellsdma-ranges#interconnect-cellsinterconnectsinterconnect-nameshvcc-supplycpvdd-supply#io-channel-cellsx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltopp-sharedopp-hzopp-microvoltclock-latency-nsethernet0serial0serial1serial2serial3serial4