,8)((g(V2F-1XV7 Cortex-A53x2 SMMG@ arm,vexpress,v2f-1xv7,ca53x2arm,vexpress,v2f-1xv7arm,vexpress+<Kfixed-regulator-0 regulator-fixedW3V3f2Z~2Zclk24mhz fixed-clockn6 v2m:clk24mhz refclk1mhz fixed-clockB@v2m:refclk1mhzrefclk32khz fixed-clockv2m:refclk32khzleds gpio-ledsled-1v2m:green:user1  heartbeatled-2v2m:green:user2 disk-activityled-3v2m:green:user3 cpu0led-4v2m:green:user4 cpu1led-5v2m:green:user5 cpu2led-6v2m:green:user6 cpu3led-7v2m:green:user7 cpu4led-8v2m:green:user8 cpu5bus@8000000 simple-bus<Kx   ?/            !!""##$$%%&&''(())**motherboard-busV2M-P1=rs1 arm,vexpress,v2m-p1simple-bus<K flash@0 arm,vexpress-flashcfi-flashPTpartitions arm,arm-firmware-suitepsram@100000000 arm,vexpress-psrammtd-ram PTethernet@202000000 smsc,lan9118smsc,lan9115 P_jmiisusb@203000000 nxp,usb-isp1761 P_iofpga-bus@300000000 simple-bus<K sysreg@10000 arm,vexpress-sysregP<K gpio@8 arm,vexpress-sysreg,sys_ledPgpio@48 arm,vexpress-sysreg,sys_mciPHgpio@4c arm,vexpress-sysreg,sys_flashPLsysctl@20000 arm,sp810arm,primecellP refclktimclkapb_pclk0timerclken0timerclken1timerclken2timerclken3 i2c@30000 arm,versatile-i2cP<Kpcie-switch@60 idt,89hpes32h8P`aaci@40000 arm,pl041arm,primecellP_  apb_pclkmmci@50000 arm,pl180arm,primecellP_  & /8F mclkapb_pclkkmi@60000 arm,pl050arm,primecellP_  KMIREFCLKapb_pclkkmi@70000 arm,pl050arm,primecellP_  KMIREFCLKapb_pclkserial@90000 arm,pl011arm,primecellP _ uartclkapb_pclkserial@a0000 arm,pl011arm,primecellP _ uartclkapb_pclkserial@b0000 arm,pl011arm,primecellP _ uartclkapb_pclkserial@c0000 arm,pl011arm,primecellP _ uartclkapb_pclkwdt@f0000 arm,sp805arm,primecellP_wdogclkapb_pclktimer@110000 arm,sp804arm,primecellP_timclken1timclken2apb_pclktimer@120000 arm,sp804arm,primecellP_timclken1timclken2apb_pclki2c@160000 arm,versatile-i2cP<Kdvi-transmitter@39 sil,sii9022-tpisil,sii9022P9ports<Kport@0PendpointR dvi-transmitter@60 sil,sii9022-cpisil,sii9022P`rtc@170000 arm,pl031arm,primecellP_ apb_pclkcompact-flash@1a0000 arm,vexpress-cfata-genericPbclcd@1f0000 arm,pl111arm,primecellP lcombined_ clcdclkapb_pclk|7 portendpointR  mcc arm,vexpress,config-busoscclk0 arm,vexpress-osc}x@ v2m:oscclk0oscclk1 arm,vexpress-oscjep@ v2m:oscclk1 oscclk2 arm,vexpress-oscn6n6 v2m:oscclk2 volt-vio arm,vexpress-voltWVIOVIOtemp-mcc arm,vexpress-tempMCCreset arm,vexpress-resetmuxfpga arm,vexpress-muxfpgashutdown arm,vexpress-shutdownreboot arm,vexpress-reboot dvimode arm,vexpress-dvimode chosenserial0:38400n8aliases?/bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@90000? /bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@a0000?/bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@b0000?/bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@c0000=$/bus@8000000/motherboard-bus/iofpga-bus@300000000/i2c@160000<)/bus@8000000/motherboard-bus/iofpga-bus@300000000/i2c@30000cpus<Kcpu@0.cpu arm,cortex-a53P:cpu@1.cpu arm,cortex-a53P:l2-cache0 cachememory@80000000.memoryPreserved-memory<Kvram@18000000 shared-dma-poolPK interrupt-controller@2c001000 arm,gic-400 <R@P,, ,@ ,`  _ timer arm,armv8-timer0_   pmu arm,armv8-pmuv3_DEdcc arm,vexpress,config-bussmclk arm,vexpress-oscbZbZsmclkvolt-vio arm,vexpress-voltWVIO_UPf 5~w@volt-12v arm,vexpress-voltW12temp-fpga arm,vexpress-tempFPGA modelarm,hbiarm,vexpress,sitecompatibleinterrupt-parent#address-cells#size-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onphandle#clock-cellsclock-frequencyclock-output-nameslabelgpioslinux,default-triggerranges#interrupt-cellsinterrupt-map-maskinterrupt-maparm,v2m-memory-mapregbank-widthinterruptsphy-modereg-io-widthsmsc,irq-active-highsmsc,irq-push-pullvdd33a-supplyvddvario-supplyport1-otggpio-controller#gpio-cellsclocksclock-namesassigned-clocksassigned-clock-parentscd-gpioswp-gpiosmax-frequencyvmmc-supplyremote-endpointreg-shiftinterrupt-namesmax-memory-bandwidthmemory-regionarm,pl11x,tft-r0g0b0-padsarm,vexpress,config-bridgearm,vexpress-sysreg,funcfreq-rangestdout-pathserial0serial1serial2serial3i2c0i2c1device_typenext-level-cacheno-mapinterrupt-controller