I8DD(nD Altera SOCFPGA Arria 10"!altr,socfpga-arria10altr,socfpgacpus,altr,socfpga-a10-smpcpu@0!arm,cortex-a9:cpuFJcpu@1!arm,cortex-a9:cpuFJintc@ffffd000!arm,cortex-a9-gic[lFsoc !simple-bus:socamba !simple-buspdma@ffda1000!arm,pl330arm,primecellFlSTUVWXYZ[  apb_pclkbase_fpga_region !fpga-regionclkmgr@ffd04000 !altr,clk-mgrF@clockscb_intosc_hs_div2_clk !fixed-clock cb_intosc_ls_clk !fixed-clockf2s_free_clk !fixed-clockosc1 !fixed-clock}x@main_pll@40!altr,socfpga-a10-pll-clock F@main_mpu_base_clk!altr,socfpga-a10-perip-clk  @  main_noc_base_clk!altr,socfpga-a10-perip-clk  D main_emaca_clk@68!altr,socfpga-a10-perip-clkFhmain_emacb_clk@6c!altr,socfpga-a10-perip-clkFlmain_emac_ptp_clk@70!altr,socfpga-a10-perip-clkFpmain_gpio_db_clk@74!altr,socfpga-a10-perip-clkFtmain_sdmmc_clk@78!altr,socfpga-a10-perip-clkFxmain_s2f_usr0_clk@7c!altr,socfpga-a10-perip-clkF|main_s2f_usr1_clk@80!altr,socfpga-a10-perip-clkFmain_hmc_pll_ref_clk@84!altr,socfpga-a10-perip-clkFmain_periph_ref_clk@9c!altr,socfpga-a10-perip-clkF periph_pll@c0!altr,socfpga-a10-pll-clock F peri_mpu_base_clk!altr,socfpga-a10-perip-clk   @  peri_noc_base_clk!altr,socfpga-a10-perip-clk   D peri_emaca_clk@e8!altr,socfpga-a10-perip-clk Fperi_emacb_clk@ec!altr,socfpga-a10-perip-clk Fperi_emac_ptp_clk@f0!altr,socfpga-a10-perip-clk Fperi_gpio_db_clk@f4!altr,socfpga-a10-perip-clk Fperi_sdmmc_clk@f8!altr,socfpga-a10-perip-clk Fperi_s2f_usr0_clk@fc!altr,socfpga-a10-perip-clk Fperi_s2f_usr1_clk@100!altr,socfpga-a10-perip-clk Fperi_hmc_pll_ref_clk@104!altr,socfpga-a10-perip-clk Fmpu_free_clk@60!altr,socfpga-a10-perip-clk  F`noc_free_clk@64!altr,socfpga-a10-perip-clk Fds2f_user1_free_clk@104!altr,socfpga-a10-perip-clk Fsdmmc_free_clk@f8!altr,socfpga-a10-perip-clk Fl4_sys_free_clk!altr,socfpga-a10-perip-clk)l4_main_clk!altr,socfpga-a10-gate-clk  "Hl4_mp_clk!altr,socfpga-a10-gate-clk  "Hl4_sp_clk!altr,socfpga-a10-gate-clk  "Hmpu_periph_clk!altr,socfpga-a10-gate-clk"H(sdmmc_clk!altr,socfpga-a10-gate-clk"+!qspi_clk!altr,socfpga-a10-gate-clk" 'nand_x_clk!altr,socfpga-a10-gate-clk" nand_ecc_clk!altr,socfpga-a10-gate-clk" #nand_clk!altr,socfpga-a10-gate-clk" "spi_m_clk!altr,socfpga-a10-gate-clk" usb_clk!altr,socfpga-a10-gate-clk"*s2f_usr1_clk!altr,socfpga-a10-gate-clk"stmmac-axi-config5EUethernet@ff8000008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac _DF  \rmacirq@ stmmaceth (stmmacethstmmaceth-ocpokay rgmii*7DQ^kxD%ethernet@ff8020008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac _HF  ]rmacirq@ stmmaceth!)stmmacethstmmaceth-ocp disabledethernet@ff8040008!altr,socfpga-stmmac-a10-s10snps,dwmac-3.72asnps,dwmac _LF@  ^rmacirq@ stmmaceth"*stmmacethstmmaceth-ocp disabledgpio@ffc02900!snps,dw-apb-gpioF)X disabledgpio-controller@0!snps,dw-apb-gpio-portFl[ pgpio@ffc02a00!snps,dw-apb-gpioF*Yokaygpio-controller@0!snps,dw-apb-gpio-portFl[ q gpio@ffc02b00!snps,dw-apb-gpioF+Z disabledgpio-controller@0!snps,dw-apb-gpio-portFl[ rfpga-mgr@ffd03000!altr,socfpga-a10-fpga-mgrF0 fpgamgri2c@ffc02200!snps,designware-i2cF" iH disabledi2c@ffc02300!snps,designware-i2cF# jIokayppadc@14 !lltc,ltc2497F adc@16 !lltc,ltc2497F eeprom@51 !atmel,24c32FQ, rtc@68!dallas,ds1339Fhltc@5c!ltc2977F\i2c@ffc02400!snps,designware-i2cF$ kJ disabledi2c@ffc02500!snps,designware-i2cF% lK disabledi2c@ffc02600!snps,designware-i2cF& mL disabledspi@ffda4000!snps,dw-apb-ssiF@ e51 disabledspi@ffda5000!snps,dw-apb-ssiFP f5<K2okayresource-manager@0 !altr,a10srFZ l[gpio-controller!altr,a10sr-gpio,reset-controller!altr,a10sr-resetlsdr@ffcfb100!altr,sdr-ctlsysconFϱ$l2-cache@fffff000!arm,pl310-cacheF ydwmmc0@ff808000!altr,socfpga-dw-mshcF b!biuciu' disablednand@ffb90000!altr,socfpga-denali-nandF nand_datadenali_reg c "#nandnand_xecc% disabledsram@ffe00000 !mmio-sramFeccmgr!altr,socfpga-a10-ecc-manager_l[sdramedac!altr,sdram-edac-a10$1l2-ecc@ffd06010!altr,socfpga-a10-l2-eccF` ocram-ecc@ff8c3000!altr,socfpga-a10-ocram-eccF0!emac0-rx-ecc@ff8c0800!altr,socfpga-eth-mac-eccF%$emac0-tx-ecc@ff8c0c00!altr,socfpga-eth-mac-eccF %%dma-ecc@ff8c8000!altr,socfpga-dma-eccF *usb0-ecc@ff8c8800!altr,socfpga-usb-eccF&"spi@ff809000!cdns,qspi-norF d'&okayn25q00@0 !n25q00aaFZ#2AQa2o2}partition@qspi-bootBoot and fpga dataFrpartition@qspi-rootfsRoot Filesystem - JFFS2Frrstmgr@ffd05000l !altr,rst-mgrFP snoop-control-unit@ffffc000!arm,cortex-a9-scuFsysmgr@ffd06000!altr,sys-mgrsysconF`b0timer@ffffc600!arm,cortex-a9-twd-timerF  (timer0@ffc02700!snps,dw-apb-timer sF'timerDtimertimer1@ffc02800!snps,dw-apb-timer tF(timerEtimertimer2@ffd00000!snps,dw-apb-timer uF)timerBtimertimer3@ffd00100!snps,dw-apb-timer vF)timerCtimerserial0@ffc02000!snps,dw-apb-uartF  nP disabledserial1@ffc02100!snps,dw-apb-uartF! oQokayusbphy!usb-nop-xceivokay+usb@ffb00000 !snps,dwc2F _*otg#dwc2+ usb2-phyokay&usb@ffb40000 !snps,dwc2F `*otg$dwc2+ usb2-phy disabledwatchdog@ffd00200 !snps,dw-wdtF w)@ disabledwatchdog@ffd00300 !snps,dw-wdtF x)Aokayaliases/soc/ethernet@ff800000/soc/serial1@ffc02100chosen earlyprintk#serial0:115200n8memory@0:memoryF@a10leds !gpio-ledsa10sr_led0 a10sr-led0 ,a10sr_led1 a10sr-led1 ,a10sr_led2 a10sr-led2 ,a10sr_led3 a10sr-led3 ,033-v-ref!regulator-fixed/0.33V> V  #address-cells#size-cellsmodelcompatibleenable-methoddevice_typeregnext-level-cache#interrupt-cellsinterrupt-controllerphandleinterrupt-parentrangesinterrupts#dma-cells#dma-channels#dma-requestsclocksclock-namesfpga-mgr#clock-cellsclock-frequencydiv-regfixed-dividerclk-gateclk-phasesnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenaltr,sysmgr-sysconinterrupt-namesmac-addresssnps,multicast-filter-binssnps,perfect-filter-entriestx-fifo-depthrx-fifo-depthresetsreset-namessnps,axi-configstatusphy-modephy-addrtxd0-skew-pstxd1-skew-pstxd2-skew-pstxd3-skew-psrxd0-skew-psrxd1-skew-psrxd2-skew-psrxd3-skew-pstxen-skew-pstxc-skew-psrxdv-skew-psrxc-skew-psmax-frame-sizegpio-controller#gpio-cellssnps,nr-gpiosi2c-sda-falling-time-nsi2c-scl-falling-time-nsvref-supplypagesizenum-cstx-dma-channelrx-dma-channelspi-max-frequency#reset-cellscache-unifiedcache-levelprefetch-dataprefetch-instrarm,shared-overridereg-namesaltr,sdr-sysconaltr,ecc-parentcdns,fifo-depthcdns,fifo-widthcdns,trigger-addressm25p,fast-readcdns,page-sizecdns,block-sizecdns,read-delaycdns,tshsl-nscdns,tsd2d-nscdns,tchsh-nscdns,tslch-nslabelaltr,modrst-offsetcpu1-start-addrreg-shiftreg-io-width#phy-cellsphysphy-namesdisable-over-currentethernet0serial0bootargsstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvolt