8( ;compulab,cl-som-am57xti,am5728ti,dra742ti,dra74ti,dra7&7CompuLab CL-SOM-AM57xchosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0?L/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0BV/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0B^/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bf/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bn/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0Bv/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0B~/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0B/ocp/interconnect@48400000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48400000/segment@0/target-module@22000/serial@0B/ocp/interconnect@48400000/segment@0/target-module@24000/serial@0E/ocp/interconnect@4ae00000/segment@20000/target-module@b000/serial@0N/ocp/interconnect@48400000/segment@0/target-module@84000/ethernet@0/slave@200N/ocp/interconnect@48400000/segment@0/target-module@84000/ethernet@0/slave@300B/ocp/interconnect@4ae00000/segment@30000/target-module@c000/can@0?/ocp/interconnect@48400000/segment@0/target-module@80000/can@0/ocp/spi@4b300000timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&cpuscpu@0 cpuarm,cortex-a15*1cpu=KZeqcpu@1 cpuarm,cortex-a15*1cpu=KZopp-tableoperating-points-v2-ti-cpuopp_nom-1000000000;, P0, P0opp_od-1176000000FV@ @@ @opp_high@1500000000Yh/v~v~socti,omap-inframpu ti,omap5-mpumpuocpti,dra7-l3-nocsimple-busl3_main_1l3_main_2 DE  interconnect@4a000000ti,dra7-l4-cfgsimple-busJJJ aplaia0$JJ J segment@0 simple-bus\ @@PP`` ``pp      @@PP``pp target-module@2000ti,sysc-omap4ti,sysc rev  scm@0ti,dra7-scm-coresimple-bus   scm_conf@0sysconsimple-bus  pbias_regulator@e00ti,pbias-dra7ti,pbias-omap pbias_mmc_omap5pbias_mmc_omap5w@2Zphy-gmii-selti,dra7xx-phy-gmii-selT5clocksdss_deshdcp_clk@558@ti,gate-clock* MXehrpwm0_tbclk@558@ti,gate-clock* MXehrpwm1_tbclk@558@ti,gate-clock* MXehrpwm2_tbclk@558@ti,gate-clock* MXsys_32k_ck@ ti,mux-clock* MPpinmux@1400ti,dra7-padconfpinctrl-singlehZi ?leds_pins_default|i2c1_pins_defaulti2c3_pins_default  i2c4_pins_default  tps659038_pins_defaultmmc2_pins_defaultPpinmux_qspi1_pins0tcpsw_pins_defaultPTX\`dhlptx|cpsw_pins_sleepPTX\`dhlptx|davinci_mdio_pins_defaultdavinci_mdio_pins_sleeppinmux_ads7846_pinsdmcasp3_pins_default $(,0mcasp3_pins_sleep $(,0scm_conf@1c04syscon scm_conf@1c24syscon$$_dma-router@b78ti,dra7-dma-crossbar xdma-router@c78ti,dra7-dma-crossbar x|target-module@5000ti,sysc-omap4ti,syscPrev Pcm_core_aon@0ti,dra7-cm-core-aonsimple-bus   clocksatl_clkin0_ck@ti,dra7-atl-clock *atl_clkin1_ck@ti,dra7-atl-clock *atl_clkin2_ck@ti,dra7-atl-clock *atl_clkin3_ck@ti,dra7-atl-clock *hdmi_clkin_ck@ fixed-clock0mlb_clkin_ck@ fixed-clockmlbp_clkin_ck@ fixed-clockpciesref_acs_clk_ck@ fixed-clock@ref_clkin0_ck@ fixed-clockref_clkin1_ck@ fixed-clockref_clkin2_ck@ fixed-clockref_clkin3_ck@ fixed-clockrmii_clk_ck@ fixed-clocksdvenc_clkin_ck@ fixed-clocksecure_32k_clk_src_ck@ fixed-clockwsys_clk32_crystal_ck@ fixed-clock sys_clk32_pseudo_ck@fixed-factor-clock* b virt_12000000_ck@ fixed-clockevirt_13000000_ck@ fixed-clock]@virt_16800000_ck@ fixed-clockYgvirt_19200000_ck@ fixed-clock$hvirt_20000000_ck@ fixed-clock1-fvirt_26000000_ck@ fixed-clockivirt_27000000_ck@ fixed-clockjvirt_38400000_ck@ fixed-clockIksys_clkin2@ fixed-clockXlusb_otg_clkin_ck@ fixed-clocktvideo1_clkin_ck@ fixed-clock:video1_m2_clkin_ck@ fixed-clock/video2_clkin_ck@ fixed-clock;video2_m2_clkin_ck@ fixed-clock.dpll_abe_ck@1e0@ti,omap4-dpll-m4xen-clock*dpll_abe_x2_ck@ti,omap4-dpll-x2-clock*dpll_abe_m2x2_ck@1f0@ti,divider-clock**<Sabe_clk@108@ti,divider-clock*jndpll_abe_m2_ck@1f0@ti,divider-clock**<Spdpll_abe_m3x2_ck@1f4@ti,divider-clock**<Sdpll_core_byp_mux@12c@ ti,mux-clock*M,dpll_core_ck@120@ti,omap4-dpll-core-clock* $,(dpll_core_x2_ck@ti,omap4-dpll-x2-clock*dpll_core_h12x2_ck@13c@ti,divider-clock*?*<<Smpu_dpll_hs_clk_div@fixed-factor-clock* dpll_mpu_ck@160@ti,omap5-mpu-dpll-clock*`dlhdpll_mpu_m2_ck@170@ti,divider-clock**p<Smpu_dclk_div@fixed-factor-clock* {dsp_dpll_hs_clk_div@fixed-factor-clock* dpll_dsp_byp_mux@240@ ti,mux-clock*M@dpll_dsp_ck@234@ti,omap4-dpll-clock*48@< #F dpll_dsp_m2_ck@244@ti,divider-clock* *D<S!#F!iva_dpll_hs_clk_div@fixed-factor-clock* "dpll_iva_byp_mux@1ac@ ti,mux-clock*"M#dpll_iva_ck@1a0@ti,omap4-dpll-clock*#$Ep}@$dpll_iva_m2_ck@1b0@ti,divider-clock*$*<S%%%iva_dclk@fixed-factor-clock*% }dpll_gpu_byp_mux@2e4@ ti,mux-clock*M&dpll_gpu_ck@2d8@ti,omap4-dpll-clock*&'Ly@'dpll_gpu_m2_ck@2e8@ti,divider-clock*'*<S(_(k(dpll_core_m2_ck@130@ti,divider-clock**0<S)core_dpll_out_dclk_div@fixed-factor-clock*) dpll_ddr_byp_mux@21c@ ti,mux-clock*M*dpll_ddr_ck@210@ti,omap4-dpll-clock**+dpll_ddr_m2_ck@220@ti,divider-clock*+* <Sqdpll_gmac_byp_mux@2b4@ ti,mux-clock*M,dpll_gmac_ck@2a8@ti,omap4-dpll-clock*,-dpll_gmac_m2_ck@2b8@ti,divider-clock*-*<Srvideo2_dclk_div@fixed-factor-clock*. video1_dclk_div@fixed-factor-clock*/ hdmi_dclk_div@fixed-factor-clock*0 per_dpll_hs_clk_div@fixed-factor-clock* Cusb_dpll_hs_clk_div@fixed-factor-clock* Geve_dpll_hs_clk_div@fixed-factor-clock* 1dpll_eve_byp_mux@290@ ti,mux-clock*1M2dpll_eve_ck@284@ti,omap4-dpll-clock*23dpll_eve_m2_ck@294@ti,divider-clock*3*<S4eve_dclk_div@fixed-factor-clock*4 dpll_core_h13x2_ck@140@ti,divider-clock*?*@<Sdpll_core_h14x2_ck@144@ti,divider-clock*?*D<SQdpll_core_h22x2_ck@154@ti,divider-clock*?*T<S<dpll_core_h23x2_ck@158@ti,divider-clock*?*X<SVdpll_core_h24x2_ck@15c@ti,divider-clock*?*\<Sdpll_ddr_x2_ck@ti,omap4-dpll-x2-clock*+5dpll_ddr_h11x2_ck@228@ti,divider-clock*5?*(<Sdpll_dsp_x2_ck@ti,omap4-dpll-x2-clock* 6dpll_dsp_m3x2_ck@248@ti,divider-clock*6*H<S7ׄ7dpll_gmac_x2_ck@ti,omap4-dpll-x2-clock*-8dpll_gmac_h11x2_ck@2c0@ti,divider-clock*8?*<S9dpll_gmac_h12x2_ck@2c4@ti,divider-clock*8?*<Sdpll_gmac_h13x2_ck@2c8@ti,divider-clock*8?*<Sdpll_gmac_m3x2_ck@2bc@ti,divider-clock*8*<Sgmii_m_clk_div@fixed-factor-clock*9 hdmi_clk2_div@fixed-factor-clock*0 hdmi_div_clk@fixed-factor-clock*0 l3_iclk_div@100@ti,divider-clockM*j l4_root_clk_div@fixed-factor-clock*   video1_clk2_div@fixed-factor-clock*: video1_div_clk@fixed-factor-clock*: video2_clk2_div@fixed-factor-clock*; video2_div_clk@fixed-factor-clock*; ipu1_gfclk_mux@520@ ti,mux-clock*<M =<=dummy_ck@ fixed-clockclockdomainsmpu-cm@300 ti,omap4-cm mpu-clkctrl@20 ti,clkctrl @dsp1-cm@400 ti,omap4-cm dsp1-clkctrl@20 ti,clkctrl @ipu-cm@500 ti,omap4-cm ipu1-clkctrl@20 ti,clkctrl @ipu-clkctrl@50 ti,clkctrlP4@dsp2-cm@600 ti,omap4-cm dsp2-clkctrl@20 ti,clkctrl @rtc-cm@700 ti,omap4-cm rtc-clkctrl@20 ti,clkctrl (@target-module@8000ti,sysc-omap4ti,syscrev  cm_core@0ti,dra7-cm-coresimple-bus0 0clocksdpll_pcie_ref_ck@200@ti,omap4-dpll-clock* >dpll_pcie_ref_m2ldo_ck@210@ti,divider-clock*>*<S?apll_pcie_in_clk_mux@4ae06118 ti,mux-clock*?@@MAapll_pcie_ck@21c@ti,dra7-apll-clock*A> Boptfclk_pciephy_div@4a00821cti,divider-clock*B@Maapll_pcie_clkvcoldo@fixed-factor-clock*B apll_pcie_clkvcoldo_div@fixed-factor-clock*B apll_pcie_m2_ck@fixed-factor-clock*B vdpll_per_byp_mux@14c@ ti,mux-clock*CMLDdpll_per_ck@140@ti,omap4-dpll-clock*D@DLHEdpll_per_m2_ck@150@ti,divider-clock*E*P<SFfunc_96m_aon_dclk_div@fixed-factor-clock*F dpll_usb_byp_mux@18c@ ti,mux-clock*GMHdpll_usb_ck@180@ti,omap4-dpll-j-type-clock*HIdpll_usb_m2_ck@190@ti,divider-clock*I*<SMdpll_pcie_ref_m2_ck@210@ti,divider-clock*>*<Sudpll_per_x2_ck@ti,omap4-dpll-x2-clock*EJdpll_per_h11x2_ck@158@ti,divider-clock*J?*X<SKdpll_per_h12x2_ck@15c@ti,divider-clock*J?*\<Sdpll_per_h13x2_ck@160@ti,divider-clock*J?*`<Sdpll_per_h14x2_ck@164@ti,divider-clock*J?*d<SRdpll_per_m2x2_ck@150@ti,divider-clock*J*P<SLdpll_usb_clkdcoldo@fixed-factor-clock*I Ofunc_128m_clk@fixed-factor-clock*K func_12m_fclk@fixed-factor-clock*L func_24m_clk@fixed-factor-clock*F func_48m_fclk@fixed-factor-clock*L func_96m_fclk@fixed-factor-clock*L l3init_60m_fclk@104@ti,divider-clock*Mclkout2_clk@6b0@ti,gate-clock*NMl3init_960m_gfclk@6c0@ti,gate-clock*OMusb_phy1_always_on_clk32k@640@ti,gate-clock*PM@[usb_phy2_always_on_clk32k@688@ti,gate-clock*PM]usb_phy3_always_on_clk32k@698@ti,gate-clock*PM^gpu_core_gclk_mux@1220@ ti,mux-clock *QR(M S(Sgpu_hyd_gclk_mux@1220@ ti,mux-clock *QR(M T(Tl3instr_ts_gclk_div@e50@ti,divider-clock*UMP  vip1_gclk_mux@1020@ ti,mux-clock* VM vip2_gclk_mux@1028@ ti,mux-clock* VM(vip3_gclk_mux@1030@ ti,mux-clock* VM0clockdomainscoreaon_clkdmti,clockdomain*Icoreaon-cm@600 ti,omap4-cm coreaon-clkctrl@20 ti,clkctrl @bl3main1-cm@700 ti,omap4-cm l3main1-clkctrl@20 ti,clkctrl t@ipu2-cm@900 ti,omap4-cm   ipu2-clkctrl@20 ti,clkctrl @dma-cm@a00 ti,omap4-cm   dma-clkctrl@20 ti,clkctrl @Yemif-cm@b00 ti,omap4-cm   emif-clkctrl@20 ti,clkctrl @atl-cm@c00 ti,omap4-cm   atl-clkctrl@0 ti,clkctrl@l4cfg-cm@d00 ti,omap4-cm   l4cfg-clkctrl@20 ti,clkctrl @cl3instr-cm@e00 ti,omap4-cm l3instr-clkctrl@20 ti,clkctrl @dss-cm@1100 ti,omap4-cm dss-clkctrl@20 ti,clkctrl @l3init-cm@1300 ti,omap4-cm l3init-clkctrl@20 ti,clkctrl l@Zpcie-clkctrl@b0 ti,clkctrl @`gmac-clkctrl@d0 ti,clkctrl@l4per-cm@1700 ti,omap4-cm l4per-clkctrl@28 ti,clkctrl((d$<@p@ W\Xl4sec-clkctrl@1a0 ti,clkctrl,@l4per2-clkctrl@c ti,clkctrl@  8` x$<@Wl4per3-clkctrl@14 ti,clkctrl0@target-module@56000ti,sysc-omap2ti,sysc dma_system``,`(revsyscsyss# *Y1fck `dma-controller@0ti,omap4430-sdma0   target-module@5e000ti,sysc  disabled  target-module@80000ti,sysc-omap2ti,sysc ocp2scp1revsyscsyss  *Z1fck ocp2scp@0ti,omap-ocp2scp  phy@4000ti,dra7x-usb2ti,omap-usb2@ *[Z1wkupclkrefclk5#\phy@5000 ti,dra7x-usb2-phy2ti,omap-usb2P t*]Z 1wkupclkrefclk5#\phy@4400 ti,omap-usb3DHdL@phy_rxphy_txpll_ctrl p*^Z1wkupclksysclkrefclk5target-module@90000ti,sysc-omap2ti,sysc ocp2scp3   revsyscsyss  *Z1fck  ocp2scp@0ti,omap-ocp2scp  pciephy@4000ti,phy-pipe3-pcie@Ddphy_rxphy_tx_._4*>?`` ` a;1dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk5pciephy@5000ti,phy-pipe3-pciePTdphy_rxphy_tx_ ._4*>?`` ` a;1dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk5  disabledphy@6000ti,phy-pipe3-sata`ddh@phy_rxphy_txpll_ctrl t*Zh1sysclkrefclk9 5target-module@a0000ti,sysc  disabled  target-module@d9000ti,sysc-omap4-srti,syscsmartreflex_mpu 8sysc *b1fck  target-module@dd000ti,sysc-omap4-srti,syscsmartreflex_core 8sysc *b1fck  target-module@e0000ti,sysc  disabled target-module@f4000ti,sysc-omap4ti,sysc mailbox1@@ revsysc  *c1fck @mailbox@0ti,omap4-mailbox$IUg  disabledtarget-module@f6000ti,sysc-omap2ti,sysc spinlock```revsyscsyss  *c1fck `spinlock@0ti,omap4-hwspinlockysegment@100000 simple-bus  00  00@@PP``pp  00@@PP``pp  00@@PP``pp  00@@PP``pptarget-module@2000ti,sysc  disabled  target-module@8000ti,sysc  disabled target-module@40000ti,sysc  disabled target-module@51000ti,sysc  disabled target-module@53000ti,sysc  disabled 0target-module@55000ti,sysc  disabled Ptarget-module@57000ti,sysc  disabled ptarget-module@59000ti,sysc  disabled target-module@5b000ti,sysc  disabled target-module@5d000ti,sysc  disabled target-module@5f000ti,sysc  disabled target-module@61000ti,sysc  disabled target-module@63000ti,sysc  disabled 0target-module@65000ti,sysc  disabled Ptarget-module@67000ti,sysc  disabled ptarget-module@69000ti,sysc  disabled target-module@6b000ti,sysc  disabled target-module@6d000ti,sysc  disabled target-module@71000ti,sysc  disabled target-module@73000ti,sysc  disabled 0target-module@75000ti,sysc  disabled Ptarget-module@77000ti,sysc  disabled ptarget-module@79000ti,sysc  disabled target-module@7b000ti,sysc  disabled target-module@7d000ti,sysc  disabled target-module@81000ti,sysc  disabled target-module@83000ti,sysc  disabled 0target-module@85000ti,sysc  disabled Ptarget-module@87000ti,sysc  disabled psegment@200000 simple-bus!!        !! ! 0!0@!@P!P""!!!!""@"@P"P`"`p"p""""## # 0#0@#@P#P`#`p#p!!target-module@0ti,sysc  disabled target-module@a000ti,sysc  disabled target-module@c000ti,sysc  disabled target-module@e000ti,sysc  disabled target-module@10000ti,sysc  disabled target-module@12000ti,sysc  disabled  target-module@14000ti,sysc  disabled @target-module@18000ti,sysc  disabled target-module@1a000ti,sysc  disabled target-module@1c000ti,sysc  disabled target-module@1e000ti,sysc  disabled target-module@20000ti,sysc  disabled target-module@24000ti,sysc  disabled @target-module@26000ti,sysc  disabled `target-module@2a000ti,sysc  disabled target-module@2c000ti,sysc  disabled target-module@2e000ti,sysc  disabled target-module@30000ti,sysc  disabled target-module@32000ti,sysc  disabled  target-module@34000ti,sysc  disabled @target-module@36000ti,sysc  disabled `interconnect@4ae00000ti,dra7-l4-wkupsimple-busJJJ aplaia00JJJJsegment@0 simple-busl`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc counter_32k@@ revsysc *d01fck @counter@0ti,omap-counter32k@target-module@6000ti,sysc-omap4ti,sysc`rev ` prm@0ti,dra7-prmsimple-bus0  0clockssys_clkin1@110@ ti,mux-clock*efghijk<abe_dpll_sys_clk_mux@118@ ti,mux-clock*lmabe_dpll_bypass_clk_mux@114@ ti,mux-clock*mPabe_dpll_clk_mux@10c@ ti,mux-clock*mP abe_24m_fclk@11c@ti,divider-clock*Xaess_fclk@178@ti,divider-clock*nxoabe_giclk_div@174@ti,divider-clock*otabe_lp_clk_div@1d8@ti,divider-clock* abe_sys_clk_div@120@ti,divider-clock* adc_gfclk_mux@1dc@ ti,mux-clock *lPsys_clk1_dclk_div@1c8@ti,divider-clock*@jxsys_clk2_dclk_div@1cc@ti,divider-clock*l@jyper_abe_x1_dclk_div@1bc@ti,divider-clock*p@jzdsp_gclk_div@18c@ti,divider-clock*!@j|gpu_dclk@1a0@ti,divider-clock*(@j~emif_phy_dclk_div@190@ti,divider-clock*q@jgmac_250m_dclk_div@19c@ti,divider-clock*r@jsgmac_main_clk@fixed-factor-clock*s l3init_480m_dclk_div@1ac@ti,divider-clock*M@jusb_otg_dclk_div@184@ti,divider-clock*t@jsata_dclk_div@1c0@ti,divider-clock*@jpcie2_dclk_div@1b8@ti,divider-clock*u@jpcie_dclk_div@1b4@ti,divider-clock*v@jemu_dclk_div@194@ti,divider-clock*@jsecure_32k_dclk_div@1c4@ti,divider-clock*w@jclkoutmux0_clk_mux@158@ ti,mux-clockX*xyz{|}~sXclkoutmux1_clk_mux@15c@ ti,mux-clockX*xyz{|}~s\clkoutmux2_clk_mux@160@ ti,mux-clockX*xyz{|}~s`Ncustefuse_sys_gfclk_div@fixed-factor-clock* eve_clk@180@ ti,mux-clock*47hdmi_dpll_clk_mux@164@ ti,mux-clock*ldmlb_clk@134@ti,divider-clock*@4jmlbp_clk@130@ti,divider-clock*@0jper_abe_x1_gfclk2_div@138@ti,divider-clock*p@8jtimer_sys_clk_div@144@ti,divider-clock*Dvideo1_dpll_clk_mux@168@ ti,mux-clock*lhvideo2_dpll_clk_mux@16c@ ti,mux-clock*llwkupaon_iclk_mux@108@ ti,mux-clock*Uclockdomainswkupaon-cm@1800 ti,omap4-cm wkupaon-clkctrl@20 ti,clkctrl l@dtarget-module@c000ti,sysc-omap4ti,syscrev scm_conf@0sysconsegment@10000 simple-bus`@@PPtarget-module@0ti,sysc-omap2ti,syscrevsyscsyss*dd 1fckdbclk gpio@0ti,omap4-gpio target-module@4000ti,sysc-omap2ti,sysc wd_timer2@@@revsyscsyss" *d1fck @wdt@0 ti,omap3-wdt Ktarget-module@8000ti,sysc-omap4-timerti,sysctimer1 revsysc *d 1fck timer@0ti,omap5430-timer *d 1fck target-module@c000ti,sysc  disabled segment@20000 simple-bus``  00pptarget-module@0ti,sysc-omap4-timerti,sysctimer12 revsysc *d(1fck timer@0ti,omap5430-timer Ztarget-module@2000ti,sysc  disabled  target-module@6000ti,sysc  disabledH`p (*0target-module@b000ti,sysc-omap2ti,syscPTXrevsyscsyss *d`1fck serial@0ti,dra742-uartti,omap4-uart l  disabledtarget-module@f000ti,sysc  disabled segment@30000 simple-bus   00@@PP``pptarget-module@1000ti,sysc  disabled target-module@3000ti,sysc  disabled 0target-module@5000ti,sysc  disabled Ptarget-module@7000ti,sysc  disabled ptarget-module@9000ti,sysc  disabled target-module@c000ti,sysc-omap4ti,sysc rev *dh1fck  can@0ti,dra7-d_can   X  *dh  disabledinterconnect@48000000ti,dra7-l4-per1simple-bus0HHHHHHaplaia0ia1ia2ia3H H segment@0 simple-bus  00@@PP``ppPP``pp  0000@@  0 0``pp          @ @ ` ` @   ``pp @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXrevsyscsyss *(1fck serial@0ti,dra742-uartti,omap4-uart El  disabled56txrxtarget-module@32000ti,sysc-omap4-timerti,sysctimer2   revsysc *1fck  timer@0ti,omap5430-timer *1fck !target-module@34000ti,sysc-omap4-timerti,sysctimer3@@ revsysc *1fck @timer@0ti,omap5430-timer *1fck "target-module@36000ti,sysc-omap4-timerti,sysctimer4`` revsysc * 1fck `timer@0ti,omap5430-timer * 1fck #target-module@3e000ti,sysc-omap4-timerti,sysctimer9 revsysc *(1fck timer@0ti,omap5430-timer *(1fck (target-module@51000ti,sysc-omap2ti,syscrevsyscsyss* 1fckdbclk gpio@0ti,omap4-gpio target-module@53000ti,sysc-omap2ti,sysc001revsyscsyss* 1fckdbclk 0gpio@0ti,omap4-gpio ttarget-module@55000ti,sysc-omap2ti,syscPPQrevsyscsyss*88 1fckdbclk Pgpio@0ti,omap4-gpio  okaytarget-module@57000ti,sysc-omap2ti,syscppqrevsyscsyss*@@ 1fckdbclk pgpio@0ti,omap4-gpio  okaytarget-module@59000ti,sysc-omap2ti,syscrevsyscsyss*HH 1fckdbclk gpio@0ti,omap4-gpio target-module@5b000ti,sysc-omap2ti,syscrevsyscsyss*PP 1fckdbclk gpio@0ti,omap4-gpio target-module@5d000ti,sysc-omap2ti,syscrevsyscsyss*XX 1fckdbclk gpio@0ti,omap4-gpio target-module@60000ti,sysc-omap2ti,syscrevsyscsyss *1fck i2c@0 ti,omap4-i2c 8 okaydefaulttarget-module@66000ti,sysc-omap2ti,sysc`P`T`Xrevsyscsyss *H1fck `serial@0ti,dra742-uartti,omap4-uart dl  disabled?@txrxtarget-module@68000ti,sysc-omap2ti,syscPTXrevsyscsyss *01fck serial@0ti,dra742-uartti,omap4-uart el  disabledOPtxrxtarget-module@6a000ti,sysc-omap2ti,syscPTXrevsyscsyss *1fck serial@0ti,dra742-uartti,omap4-uartCl  disabled12txrxtarget-module@6c000ti,sysc-omap2ti,syscPTXrevsyscsyss * 1fck serial@0ti,dra742-uartti,omap4-uart Dl  disabled34txrxtarget-module@6e000ti,sysc-omap2ti,syscPTXrevsyscsyss *01fck serial@0ti,dra742-uartti,omap4-uart Al  disabled78txrxtarget-module@70000ti,sysc-omap2ti,syscrevsyscsyss *x1fck i2c@0 ti,omap4-i2c 3 okaydefaulttarget-module@72000ti,sysc-omap2ti,sysc   revsyscsyss *1fck  i2c@0 ti,omap4-i2c 4  disabledtarget-module@78000ti,sysc-omap2ti,syscelmrevsyscsyss *01fck elm@0ti,am3352-elm   disabledtarget-module@7a000ti,sysc-omap2ti,syscrevsyscsyss *1fck i2c@0 ti,omap4-i2c 9 okaydefaulttps659038@58 ti,tps659038X&default tps659038_pmicti,tps659038-pmicregulatorssmps12smps12 P';smps3smps3``';smps45smps45 P';smps6smps6 P';smps7smps7 P@';smps8smps8 P';smps9smps92Z2Z';ldo1ldo1w@2Z;'ldo2ldo2w@w@';ldo3ldo3w@w@';ldo4ldo4w@w@';ldo9ldo9';ldolnldolnw@w@';ldousbldousb2Z2Z';\tps659038_pwr_buttonti,palmas-pwrbutton&M[ tps659038_gpioti,palmas-gpiortc@56emmicro,em3027Vatmel@50 atmel,24c08Pxwm8731@1a wlf,wm8731 okaytarget-module@7c000ti,sysc-omap2ti,syscrevsyscsyss *(1fck i2c@0 ti,omap4-i2c 7  disabledtarget-module@86000ti,sysc-omap4-timerti,sysctimer10`` revsysc *1fck `timer@0ti,omap5430-timer *1fck )target-module@88000ti,sysc-omap4-timerti,sysctimer11 revsysc *1fck timer@0ti,omap5430-timer *1fck *target-module@90000ti,sysc-omap2ti,syscrng   revsysc * 1fck  rng@0 ti,omap4-rng  /* 1fcktarget-module@98000ti,sysc-omap4ti,sysc   revsysc *1fck  spi@0ti,omap4-mcspi <@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3  disabledtarget-module@9a000ti,sysc-omap4ti,sysc   revsysc *1fck  spi@0ti,omap4-mcspi = +,-.tx0rx0tx1rx1  disabledtarget-module@9c000ti,sysc-omap4ti,sysc   revsysc *Z1fck  mmc@0ti,dra7-sdhci N  disabled qtarget-module@a2000ti,sysc  disabled  target-module@a4000ti,sysc  disabled @ Ptarget-module@a8000ti,sysc  disabled  @target-module@ad000ti,sysc-omap4ti,sysc   revsysc *1fck  mmc@0ti,dra7-sdhci Y  disabledА@target-module@b2000ti,sysc-omap2ti,syschdq1w   revsyscsyss *`1fck  1w@0 ti,omap3-1w 5target-module@b4000ti,sysc-omap4ti,sysc @ @ revsysc *Z1fck  @mmc@0ti,dra7-sdhci Q okay qdefault target-module@b8000ti,sysc-omap4ti,sysc   revsysc *1fck  spi@0ti,omap4-mcspi Vtx0rx0  disabledtarget-module@ba000ti,sysc-omap4ti,sysc   revsysc *1fck  spi@0ti,omap4-mcspi +FGtx0rx0  disabledtarget-module@d1000ti,sysc-omap4ti,sysc   revsysc *1fck  mmc@0ti,dra7-sdhci [  disabled q@target-module@d5000ti,sysc  disabled  Psegment@200000 simple-businterconnect@48400000ti,dra7-l4-per2simple-bus(H@H@H@H@H@aplaia0ia1ia2lH@@EE@EE@FF@HC`HC`@HCHC@HDHD@HEHE@HE@HE@@segment@0 simple-busT@@@   @@ ``  ``pp     00   @@ `` @@PP   00@@PP``pp EE@EE@FF@HC`HC`@HCHC@HDHD@HEHE@HE@HE@@target-module@20000ti,sysc-omap2ti,syscPTXrevsyscsyss *W1fck serial@0ti,dra742-uartti,omap4-uart l  disabledtarget-module@22000ti,sysc-omap2ti,sysc P T Xrevsyscsyss *W1fck  serial@0ti,dra742-uartti,omap4-uart l  disabledtarget-module@24000ti,sysc-omap2ti,sysc@P@T@Xrevsyscsyss *W1fck @serial@0ti,dra742-uartti,omap4-uart l  disabledtarget-module@2c000ti,sysc  disabled target-module@36000ti,sysc  disabled `target-module@3a000ti,sysc  disabled target-module@3c000ti,sysc-omap4ti,syscrev *1fck   disabledatl@0 ti,dra7-atl2 *1fck  disabledtarget-module@3e000ti,sysc-omap4ti,syscepwmss0 revsysc  *W1fck epwmss@0 ti,dra746-pwmssti,am33xx-pwmss0  disabled ecap@100ti,dra746-ecapti,am3352-ecapE* 1fck  disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwmE*  1tbclkfck  disabledtarget-module@40000ti,sysc-omap4ti,syscepwmss1 revsysc  *W1fck epwmss@0 ti,dra746-pwmssti,am33xx-pwmss0  disabled ecap@100ti,dra746-ecapti,am3352-ecapE* 1fck  disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwmE*  1tbclkfck  disabledtarget-module@42000ti,sysc-omap4ti,syscepwmss2   revsysc  *W1fck  epwmss@0 ti,dra746-pwmssti,am33xx-pwmss0  disabled ecap@100ti,dra746-ecapti,am3352-ecapE* 1fck  disabledpwm@200"ti,dra746-ehrpwmti,am3352-ehrpwmE*  1tbclkfck  disabledtarget-module@46000ti,sysc  disabled `target-module@48000ti,sysc  disabled target-module@4a000ti,sysc  disabled target-module@4c000ti,sysc  disabled target-module@50000ti,sysc  disabled target-module@54000ti,sysc  disabled @target-module@58000ti,sysc  disabled  target-module@5b000ti,sysc  disabled target-module@5d000ti,sysc  disabled target-module@60000ti,sysc-dra7-mcaspti,sysc revsysc $*1fckahclkxahclkr EE@mcasp@0ti,dra7-mcasp-audio EmpudathgPtxrxtxrx$*1fckahclkxahclkr  disabledtarget-module@64000ti,sysc-dra7-mcaspti,sysc@@ revsysc $*WTWTWT1fckahclkxahclkr@ EE@mcasp@0ti,dra7-mcasp-audio EmpudatPtxrxtxrx$*WTWT1fckahclkxahclkr  disabledtarget-module@68000ti,sysc-dra7-mcaspti,sysc revsysc *W\W\ 1fckahclkx FF@mcasp@0ti,dra7-mcasp-audio FmpudatPtxrxtxrx*W\W\ 1fckahclkx okaydefaultsleep`jr|target-module@6c000ti,sysc-dra7-mcaspti,sysc revsysc *WW 1fckahclkx HC`HC`@mcasp@0ti,dra7-mcasp-audio HC`mpudatPtxrxtxrx*WW 1fckahclkx  disabledtarget-module@70000ti,sysc-dra7-mcaspti,sysc revsysc *WlWl 1fckahclkx HCHC@mcasp@0ti,dra7-mcasp-audio HCmpudatPtxrxtxrx*WlWl 1fckahclkx  disabledtarget-module@74000ti,sysc-dra7-mcaspti,sysc@@ revsysc *WW 1fckahclkx@ HDHD@mcasp@0ti,dra7-mcasp-audio HDmpudatPtxrxtxrx*WW 1fckahclkx  disabledtarget-module@78000ti,sysc-dra7-mcaspti,sysc revsysc *WW 1fckahclkx HEHE@mcasp@0ti,dra7-mcasp-audio HEmpudatPtxrxtxrx*WW 1fckahclkx  disabledtarget-module@7c000ti,sysc-dra7-mcaspti,sysc revsysc *WW 1fckahclkx HE@HE@@mcasp@0ti,dra7-mcasp-audio HE@mpudatPtxrxtxrx*WW 1fckahclkx  disabledtarget-module@80000ti,sysc-omap4ti,sysc rev *W1fck  can@0ti,dra7-d_can   X *  disabledtarget-module@84000ti,sysc-omap4-simpleti,syscRRRrevsyscsyss *1fck @@ethernet@0ti,dra7-cpswti,cpsw* 1fckcpts  xL.0NOPQ @  okaydefaultsleep`mdio@1000ti,cpsw-mdioti,davinci_mdio*1fckB@defaultsleep`ethernet-phy@0ethernet-phy@1slave@200  )rgmii-txid2slave@300  )rgmii-txid2interconnect@48800000ti,dra7-l4-per3simple-bus(HHHHHaplaia0ia1ia2 H segment@0 simple-bus  00@@PP``pp  00@@PP``pp  00@@PP``pp@@PP  00``pp @@PP  00target-module@2000ti,sysc-omap4ti,sysc mailbox13   revsysc  *c1fck  mailbox@0ti,omap4-mailbox0{|}~IUg   disabledtarget-module@4000ti,sysc  disabled @target-module@a000ti,sysc  disabled target-module@10000ti,sysc  disabled target-module@16000ti,sysc  disabled `target-module@1c000ti,sysc  disabled target-module@1e000ti,sysc  disabled target-module@20000ti,sysc-omap4-timerti,sysctimer5 revsysc *1fck timer@0ti,omap5430-timer *1fck $target-module@22000ti,sysc-omap4-timerti,sysctimer6   revsysc *1fck  timer@0ti,omap5430-timer *1fck %target-module@24000ti,sysc-omap4-timerti,sysctimer7@@ revsysc *1fck @timer@0ti,omap5430-timer *1fck &target-module@26000ti,sysc-omap4-timerti,sysctimer8`` revsysc * 1fck `timer@0ti,omap5430-timer * 1fck 'target-module@28000ti,sysc-omap4-timerti,sysctimer13 revsysc *1fck timer@0ti,omap5430-timer *1fck Starget-module@2a000ti,sysc-omap4-timerti,sysctimer14 revsysc *1fck timer@0ti,omap5430-timer *1fck Ttarget-module@2c000ti,sysc-omap4-timerti,sysctimer15 revsysc *1fck timer@0ti,omap5430-timer *1fck Utarget-module@2e000ti,sysc-omap4-timerti,sysctimer16 revsysc *1fck timer@0ti,omap5430-timer *1fck Vtarget-module@38000ti,sysc-omap4-simpleti,syscrtcsstx revsysc *$1fck rtc@0ti,am3352-rtc*Ptarget-module@3a000ti,sysc-omap4ti,sysc mailbox2 revsysc  *c(1fck mailbox@0ti,omap4-mailbox0IUg   disabledtarget-module@3c000ti,sysc-omap4ti,sysc mailbox3 revsysc  *c01fck mailbox@0ti,omap4-mailbox0IUg   disabledtarget-module@3e000ti,sysc-omap4ti,sysc mailbox4 revsysc  *c81fck mailbox@0ti,omap4-mailbox0IUg   disabledtarget-module@40000ti,sysc-omap4ti,sysc mailbox5 revsysc  *c@1fck mailbox@0ti,omap4-mailbox0IUg  okaymbox_ipu1_ipc3x E P okaymbox_dsp1_ipc3x E P okaytarget-module@42000ti,sysc-omap4ti,sysc mailbox6   revsysc  *cH1fck  mailbox@0ti,omap4-mailbox0IUg  okaymbox_ipu2_ipc3x E P okaymbox_dsp2_ipc3x E P okaytarget-module@44000ti,sysc-omap4ti,sysc mailbox7@@ revsysc  *cP1fck @mailbox@0ti,omap4-mailbox0IUg   disabledtarget-module@46000ti,sysc-omap4ti,sysc mailbox8`` revsysc  *cX1fck `mailbox@0ti,omap4-mailbox0IUg   disabledtarget-module@48000ti,sysc  disabled target-module@4a000ti,sysc  disabled target-module@4c000ti,sysc  disabled target-module@4e000ti,sysc  disabled target-module@50000ti,sysc  disabled target-module@52000ti,sysc  disabled  target-module@54000ti,sysc  disabled @target-module@56000ti,sysc  disabled `target-module@58000ti,sysc  disabled target-module@5a000ti,sysc  disabled target-module@5c000ti,sysc  disabled target-module@5e000ti,sysc-omap4ti,sysc mailbox9 revsysc  *c`1fck mailbox@0ti,omap4-mailbox0    IUg   disabledtarget-module@60000ti,sysc-omap4ti,sysc mailbox10 revsysc  *ch1fck mailbox@0ti,omap4-mailbox0 IUg   disabledtarget-module@62000ti,sysc-omap4ti,sysc mailbox11   revsysc  *cp1fck  mailbox@0ti,omap4-mailbox0IUg   disabledtarget-module@64000ti,sysc-omap4ti,sysc mailbox12@@ revsysc  *cx1fck @mailbox@0ti,omap4-mailbox0IUg   disabledtarget-module@80000ti,sysc-omap4ti,sysc usb_otg_ss1 revsysc *Z1fck omap_dwc3_1@0ti,dwc3 H[ usb@10000 snps,dwc3p$GGHPperipheralhostotgeusb2-phyusb3-phy osuper-speed}hosttarget-module@c0000ti,sysc-omap4ti,sysc usb_otg_ss2   revsysc *Z 1fck  omap_dwc3_2@0ti,dwc3 W[ usb@10000 snps,dwc3p$IIWPperipheralhostotg eusb2-phy ohigh-speed}hosttarget-module@100000ti,sysc-omap4ti,sysc usb_otg_ss3 revsysc *Z(1fck   disabledomap_dwc3_3@0ti,dwc3 X[   disabledusb@10000 snps,dwc3p$XXXPperipheralhostotg ohigh-speed}otgtarget-module@140000ti,sysc-omap4ti,sysc usb_otg_ss4 revsysc *Z01fck   disabledtarget-module@170000ti,sysc  disabled target-module@190000ti,sysc  disabled target-module@1b0000ti,sysc  disabled target-module@1d0000ti,sysc  disabled axi@0 simple-busQQ0 pcie@51000000Q Q L rc_dbicsti_confconfig pci0с0 00pcie1 epcie-phy0_ ` -  disabledti,dra746-pcie-rcti,dra7-pcieinterrupt-controllerpcie_ep@51000000 Q(Q LQ(&ep_dbicsti_confep_dbics2addr_space HWpcie1 epcie-phy0 -_  disabled"ti,dra746-pcie-epti,dra7-pcie-epaxi@1 simple-busQQ00  disabledpcie@51800000Q Q L rc_dbicsti_confconfigcd pci0с0000pcie2 epcie-phy0 ` -ti,dra746-pcie-rcti,dra7-pcieinterrupt-controllerocmcram@40300000 mmio-sram@0 @0sram-hs@0ti,secure-ramocmcram@40400000  disabled mmio-sram@@ @@ocmcram@40500000  disabled mmio-sram@P @Pbandgap@4a0021e00J! J#, J#,J#