w8P('ti,omap3-beagleti,omap3 +7TI OMAP3 BeagleBoardchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/connector0 m/connector1cpus+cpu@0arm,cortex-a8vcpucpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+3Pdefault^hpinmux_hsusb2_pins0p      hpinmux_uart3_pinspnAphpinmux_tfp410_pinsph pinmux_dss_dpi_pinsphpinmux_twl4030_pinspAhscm_conf@270sysconsimple-busp0+ p0hpbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-hclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhh mcbsp5_fckti,composite-clock hmcbsp1_mux_fck@4ti,composite-mux-clockh mcbsp1_fckti,composite-clock hmcbsp2_mux_fck@4ti,composite-mux-clock hmcbsp2_fckti,composite-clock hmcbsp3_mux_fck@68ti,composite-mux-clock hhmcbsp3_fckti,composite-clockhmcbsp4_mux_fck@68ti,composite-mux-clock hhmcbsp4_fckti,composite-clockhclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+3pinmux_gpio1_pinspAhpinmux_twl4030_vpins phaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYhosc_sys_ck@d40 ti,mux-clock @hsys_ck@1270ti,divider-clockphsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock%0dpll3_m2x2_ckfixed-factor-clock%0hdpll4_x2_ckfixed-factor-clock%0corex2_fckfixed-factor-clock%0h wkup_l4_ickfixed-factor-clock%0hOcorex2_d3_fckfixed-factor-clock %0hcorex2_d5_fckfixed-factor-clock %0hclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockhAvirt_12m_ck fixed-clockhvirt_13m_ck fixed-clock]@hvirt_19200000_ck fixed-clock$hvirt_26000000_ck fixed-clockhvirt_38_4m_ck fixed-clockIhdpll4_ck@d00ti,omap3-dpll-per-clock D 0hdpll4_m2_ck@d48ti,divider-clock? Hh!dpll4_m2x2_mul_ckfixed-factor-clock!%0h"dpll4_m2x2_ck@d00ti,gate-clock" :h#omap_96m_alwon_fckfixed-factor-clock#%0h*dpll3_ck@d00ti,omap3-dpll-core-clock @ 0hdpll3_m3_ck@1140ti,divider-clock@h$dpll3_m3x2_mul_ckfixed-factor-clock$%0h%dpll3_m3x2_ck@d00ti,gate-clock%  :h&emu_core_alwon_ckfixed-factor-clock&%0hcsys_altclk fixed-clockh/mcbsp_clks fixed-clockhdpll3_m2_ck@d40ti,divider-clock @hcore_ckfixed-factor-clock%0h'dpll1_fck@940ti,divider-clock' @h(dpll1_ck@904ti,omap3-dpll-clock(  $ @ 4hdpll1_x2_ckfixed-factor-clock%0h)dpll1_x2m2_ck@944ti,divider-clock) Dh=cm_96m_fckfixed-factor-clock*%0h+omap_96m_fck@d40 ti,mux-clock+ @hFdpll4_m3_ck@e40ti,divider-clock @h,dpll4_m3x2_mul_ckfixed-factor-clock,%0h-dpll4_m3x2_ck@d00ti,gate-clock- :h.omap_54m_fck@d40 ti,mux-clock./ @h9cm_96m_d2_fckfixed-factor-clock+%0h0omap_48m_fck@d40 ti,mux-clock0/ @h1omap_12m_fckfixed-factor-clock1%0hHdpll4_m4_ck@e40ti,divider-clock @h2dpll4_m4x2_mul_ckti,fixed-factor-clock2P^kh3dpll4_m4x2_ck@d00ti,gate-clock3 :khdpll4_m5_ck@f40ti,divider-clock?@h4dpll4_m5x2_mul_ckti,fixed-factor-clock4P^kh5dpll4_m5x2_ck@d00ti,gate-clock5 :khkdpll4_m6_ck@1140ti,divider-clock?@h6dpll4_m6x2_mul_ckfixed-factor-clock6%0h7dpll4_m6x2_ck@d00ti,gate-clock7 :h8emu_per_alwon_ckfixed-factor-clock8%0hdclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock' ph:clkout2_src_mux_ck@d70ti,composite-mux-clock'+9 ph;clkout2_src_ckti,composite-clock:;h<sys_clkout2@d70ti,divider-clock<@ p~mpu_ckfixed-factor-clock=%0h>arm_fck@924ti,divider-clock> $emu_mpu_alwon_ckfixed-factor-clock>%0hel3_ick@a40ti,divider-clock' @h?l4_ick@a40ti,divider-clock? @h@rm_ick@c40ti,divider-clock@ @gpt10_gate_fck@a00ti,composite-gate-clock  hBgpt10_mux_fck@a40ti,composite-mux-clockA @hCgpt10_fckti,composite-clockBCgpt11_gate_fck@a00ti,composite-gate-clock  hDgpt11_mux_fck@a40ti,composite-mux-clockA @hEgpt11_fckti,composite-clockDEcore_96m_fckfixed-factor-clockF%0hmmchs2_fck@a00ti,wait-gate-clock hmmchs1_fck@a00ti,wait-gate-clock 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hi2c1_ick@a10ti,omap3-interface-clockK huart2_ick@a10ti,omap3-interface-clockK huart1_ick@a10ti,omap3-interface-clockK  hgpt11_ick@a10ti,omap3-interface-clockK  hgpt10_ick@a10ti,omap3-interface-clockK  hmcbsp5_ick@a10ti,omap3-interface-clockK  hmcbsp1_ick@a10ti,omap3-interface-clockK  homapctrl_ick@a10ti,omap3-interface-clockK hdss_tv_fck@e00ti,gate-clock9hdss_96m_fck@e00ti,gate-clockFhdss2_alwon_fck@e00ti,gate-clockhdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock hLgpt1_mux_fck@c40ti,composite-mux-clockA @hMgpt1_fckti,composite-clockLMaes2_ick@a10ti,omap3-interface-clockK hwkup_32k_fckfixed-factor-clockA%0hNgpio1_dbck@c00ti,gate-clockN hsha12_ick@a10ti,omap3-interface-clockK hwdt2_fck@c00ti,wait-gate-clockN hwdt2_ick@c10ti,omap3-interface-clockO hwdt1_ick@c10ti,omap3-interface-clockO hgpio1_ick@c10ti,omap3-interface-clockO homap_32ksync_ick@c10ti,omap3-interface-clockO hgpt12_ick@c10ti,omap3-interface-clockO hgpt1_ick@c10ti,omap3-interface-clockO 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h_gpt9_mux_fck@1040ti,composite-mux-clockA@h`gpt9_fckti,composite-clock_`per_32k_alwon_fckfixed-factor-clockA%0hagpio6_dbck@1000ti,gate-clockahgpio5_dbck@1000ti,gate-clockahgpio4_dbck@1000ti,gate-clockahgpio3_dbck@1000ti,gate-clockahgpio2_dbck@1000ti,gate-clocka hwdt3_fck@1000ti,wait-gate-clocka hper_l4_ickfixed-factor-clock@%0hbgpio6_ick@1010ti,omap3-interface-clockbhgpio5_ick@1010ti,omap3-interface-clockbhgpio4_ick@1010ti,omap3-interface-clockbhgpio3_ick@1010ti,omap3-interface-clockbhgpio2_ick@1010ti,omap3-interface-clockb hwdt3_ick@1010ti,omap3-interface-clockb huart3_ick@1010ti,omap3-interface-clockb huart4_ick@1010ti,omap3-interface-clockbhgpt9_ick@1010ti,omap3-interface-clockb hgpt8_ick@1010ti,omap3-interface-clockb hgpt7_ick@1010ti,omap3-interface-clockbhgpt6_ick@1010ti,omap3-interface-clockbhgpt5_ick@1010ti,omap3-interface-clockbhgpt4_ick@1010ti,omap3-interface-clockbhgpt3_ick@1010ti,omap3-interface-clockbhgpt2_ick@1010ti,omap3-interface-clockbhmcbsp2_ick@1010ti,omap3-interface-clockbhmcbsp3_ick@1010ti,omap3-interface-clockbhmcbsp4_ick@1010ti,omap3-interface-clockbhmcbsp2_gate_fck@1000ti,composite-gate-clockh mcbsp3_gate_fck@1000ti,composite-gate-clockhmcbsp4_gate_fck@1000ti,composite-gate-clockhemu_src_mux_ck@1140 ti,mux-clockcde@hfemu_src_ckti,clkdm-gate-clockfhgpclk_fck@1140ti,divider-clockg@pclkx2_fck@1140ti,divider-clockg@atclk_fck@1140ti,divider-clockg@traceclk_src_fck@1140 ti,mux-clockcde@hhtraceclk_fck@1140ti,divider-clockh @secure_32k_fck fixed-clockhigpt12_fckfixed-factor-clocki%0wdt1_fckfixed-factor-clocki%0security_l4_ick2fixed-factor-clock@%0hjaes1_ick@a14ti,omap3-interface-clockj rng_ick@a14ti,omap3-interface-clockj sha11_ick@a14ti,omap3-interface-clockj des1_ick@a14ti,omap3-interface-clockj cam_mclk@f00ti,gate-clockkkcam_ick@f10!ti,omap3-no-wait-interface-clock@hcsi2_96m_fck@f00ti,gate-clockhsecurity_l3_ickfixed-factor-clock?%0hlpka_ick@a14ti,omap3-interface-clockl icr_ick@a10ti,omap3-interface-clockK des2_ick@a10ti,omap3-interface-clockK mspro_ick@a10ti,omap3-interface-clockK mailboxes_ick@a10ti,omap3-interface-clockK ssi_l4_ickfixed-factor-clock@%0hssr1_fck@c00ti,wait-gate-clock hsr2_fck@c00ti,wait-gate-clock hsr_l4_ickfixed-factor-clock@%0dpll2_fck@40ti,divider-clock'@hmdpll2_ck@4ti,omap3-dpll-clockm$@4hndpll2_m2_ck@44ti,divider-clocknDhoiva2_ck@0ti,wait-gate-clockohmodem_fck@a00ti,omap3-interface-clock hsad2d_ick@a10ti,omap3-interface-clock? hmad2d_ick@a18ti,omap3-interface-clock? hmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock  hpssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock  @$hqssi_ssr_fck_3430es2ti,composite-clockpqhrssi_sst_fck_3430es2fixed-factor-clockr%0hhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockJ hssi_ick_3430es2@a10ti,omap3-ssi-interface-clocks husim_gate_fck@c00ti,composite-gate-clockF  h~sys_d2_ckfixed-factor-clock%0huomap_96m_d2_fckfixed-factor-clockF%0hvomap_96m_d4_fckfixed-factor-clockF%0hwomap_96m_d8_fckfixed-factor-clockF%0hxomap_96m_d10_fckfixed-factor-clockF%0 hydpll5_m2_d4_ckfixed-factor-clockt%0hzdpll5_m2_d8_ckfixed-factor-clockt%0h{dpll5_m2_d16_ckfixed-factor-clockt%0h|dpll5_m2_d20_ckfixed-factor-clockt%0h}usim_mux_fck@c40ti,composite-mux-clock(uvwxyz{|} @husim_fckti,composite-clock~usim_ick@c10ti,omap3-interface-clockO  hdpll5_ck@d04ti,omap3-dpll-clock  $ L 4hdpll5_m2_ck@d50ti,divider-clock Phtsgx_gate_fck@b00ti,composite-gate-clock' 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serial@4806a000ti,omap3-uartH !H12txrxuart1lserial@4806c000ti,omap3-uartH!I34txrxuart2lserial@49020000ti,omap3-uartI!Jn56txrxuart3lPdefault^i2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H  ti,twl4030Pdefault^audioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci 5C Ovacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2 vdd_ehciw@w@`regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' hregulator-vdacti,twl4030-vdacw@w@hregulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0hregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5hregulator-vusb1v8ti,twl4030-vusb1v8hregulator-vusb3v1ti,twl4030-vusb3v1hregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@`regulator-vsimti,twl4030-vsimw@-hgpioti,twl4030-gpiothtwl4030-usbti,twl4030-usb hpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madchi2c@48072000 ti,omap3-i2cH 9txrx+i2c2i2c@48060000 ti,omap3-i2cH=txrx+i2c3h mailbox@48094000ti,omap3-mailboxmailboxH @"4dsp F Qspi@48098000ti,omap2-mcspiH A+mcspi1\@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2\ +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3\ tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4\FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1j=>txrxwmmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isphmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokayhmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8!timer@49040000ti,omap3430-timerI-timer9!timer@48086000ti,omap3430-timerH`.timer10!timer@48088000ti,omap3430-timerH/timer11!timer@48304000ti,omap3430-timerH0@_timer12.usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ >ehci-phyohci@48064400ti,ohci-omap3HDLIehci@48064800 ti,ehci-omapHHMagpmc@6e000000ti,omap3430-gpmcgpmcnrxtxfr+ok0hnand@0,0ti,omap2-nand  ham1 +$$$%30BP_HpH6partition@0 X-Loaderpartition@80000U-Bootpartition@1c0000 U-Boot Env&partition@280000Kernel(@partition@780000 Filesystemhusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs a usb2-phy2dss@48050000 ti,omap3-dssHok dss_corefck+Pdefault^dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfckportendpointhportendpointh ssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ r ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+3Pdefault^pinmux_hsusb2_2_pins0p   " hisp@480bc000 ti,omap3-ispH H |l%ports+bandgap@48002524H%$ti,omap34xx-bandgap1htarget-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $syscGfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $syscGfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@thermal-zonescpu_thermalTjxN memory@80000000vmemoryleds gpio-ledspmu_statbeagleboard::pmu_stat heartbeatbeagleboard::usr0  heartbeatmmcbeagleboard::usr1 mmc0hsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z phhsusb2_phyusb-nop-xceiv hsoundti,omap-twl4030 omap3beaglegpio_keys gpio-keysuseruser encoder0 ti,tfp410  Pdefault^ ports+port@0endpoint hport@1endpoint hconnector0dvi-connectordvi portendpointh connector1svideo-connectortvportendpointhetb@540000000"arm,coresight-etb10arm,primecellTg apb_pclkin-portsportendpointhetm@54010000"arm,coresight-etm3xarm,primecellTg apb_pclkout-portsportendpointh compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0display1device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthstatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optrb-gpiosnand-bus-widthgpmc,device-widthgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,wr-access-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsti,sysc-maskpolling-delay-passivepolling-delaycoefficientsthermal-sensorslinux,default-triggergpiostartup-delay-usreset-gpiosvcc-supplyti,modelti,mcbsplinux,codewakeup-sourcepowerdown-gpiosdigitalddc-i2c-bus