EX8:( h:"ti,omap4-sdpti,omap4430ti,omap4 +7TI OMAP4 SDP boardchosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EL/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0BQ/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0BY/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Ba/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bi/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0+q/ocp/dss@58000000/encoder@58004000/display+z/ocp/dss@58000000/encoder@58005000/display /connectorcpus+cpu@0arm,cortex-a9cpucpu  'O 5acpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmudebugssinterrupt-controller@48241000arm,cortex-a9-gicH$H$ l2-cache-controller@48242000arm,pl310-cacheH$ &4local-timer@48240600arm,cortex-a9-twd-timerH$  @  interrupt-controller@48281000ti,omap4-wugen-mpuH( socti,omap-inframpu ti,omap4-mpumpuKdsp ti,omap3-c64dspiva ti,ivahdivaocpti,omap4-l3-nocsimple-bus+Pl3_main_1l3_main_2l3_main_3DD E@  interconnect@4a300000ti,omap4-l4-wkupsimple-busJ0J0J0 Waplaia0+$PJ0J1J2segment@0 simple-bus+P`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc counter_32k@@ Wrevsysca 0fck+ P@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`Wrev+ P` prm@0 ti,omap4-prm  @ + P clocks+sys_clkin_ck@110o ti,mux-clock |abe_dpll_bypass_clk_mux_ck@108o ti,mux-clock3abe_dpll_refclk_mux_ck@10co ti,mux-clock 2dbgclk_mux_ckofixed-factor-clockl4_wkup_clk_mux_ck@108o ti,mux-clocksyc_clk_div_ck@100oti,divider-clockusim_ck@1858oti,divider-clockXusim_fclk@1858oti,gate-clockXtrace_clk_div_ckoti,clkdm-gate-clock bandgap_fclk@1888oti,gate-clockclockdomainsemu_sys_clkdmti,clockdomainl4_wkup_cm@1800 ti,omap4-cm+ Pclk@20 ti,clkctrl \oemu_sys_cm@1a00 ti,omap4-cm+ Pclk@20 ti,clkctrl otarget-module@a000ti,sysc-omap4ti,syscWrev+ Pscrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310o ti,composite-no-wait-gate-clockauxclk0_src_mux_ck@310oti,composite-mux-clock auxclk0_src_ckoti,composite-clockauxclk0_ck@310oti,divider-clock*auxclk1_src_gate_ck@314o ti,composite-no-wait-gate-clockauxclk1_src_mux_ck@314oti,composite-mux-clock auxclk1_src_ckoti,composite-clockauxclk1_ck@314oti,divider-clock+auxclk2_src_gate_ck@318o ti,composite-no-wait-gate-clockauxclk2_src_mux_ck@318oti,composite-mux-clock auxclk2_src_ckoti,composite-clock auxclk2_ck@318oti,divider-clock ,auxclk3_src_gate_ck@31co ti,composite-no-wait-gate-clock!auxclk3_src_mux_ck@31coti,composite-mux-clock "auxclk3_src_ckoti,composite-clock!"#auxclk3_ck@31coti,divider-clock#-auxclk4_src_gate_ck@320o ti,composite-no-wait-gate-clock $auxclk4_src_mux_ck@320oti,composite-mux-clock  %auxclk4_src_ckoti,composite-clock$%&auxclk4_ck@320oti,divider-clock& .auxclk5_src_gate_ck@324o ti,composite-no-wait-gate-clock$'auxclk5_src_mux_ck@324oti,composite-mux-clock $(auxclk5_src_ckoti,composite-clock'()auxclk5_ck@324oti,divider-clock)$/auxclkreq0_ck@210o ti,mux-clock*+,-./auxclkreq1_ck@214o ti,mux-clock*+,-./auxclkreq2_ck@218o ti,mux-clock*+,-./auxclkreq3_ck@21co ti,mux-clock*+,-./auxclkreq4_ck@220o ti,mux-clock*+,-./ auxclkreq5_ck@224o ti,mux-clock*+,-./$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkup Wrevsysca+ Pscm@c000ti,omap4-scm-wkupsegment@10000 simple-bus+xP@@PPtarget-module@0ti,sysc-omap2ti,syscgpio1Wrevsyscsyssa fckdbclk+ Pgpio@0ti,omap4-gpio @target-module@4000ti,sysc-omap2ti,sysc@@@Wrevsyscsyss"a fck+ P@wdt@0ti,omap4-wdtti,omap3-wdt @Ptarget-module@8000ti,sysc-omap2-timerti,sysctimer1Wrevsyscsyss' a  fck+ Ptimer@0ti,omap3430-timer  fck @%target-module@c000ti,sysc-omap2ti,sysckbdWrevsyscsyss' a Xfck+ Pkeypad@0ti,omap4-keypad @xWmpu#3Ff?* !"@%-./kA4:,N0;B9<s&i#$=Cr2j1g>`lStarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkup Wrevsysca+ Ppinmux@40 ti,omap4-padconfpinctrl-single@8+m|pinmux_twl6030_wkup_pinspsegment@20000 simple-bus+P``  00@@PPpptarget-module@0ti,sysc disabled+ Ptarget-module@2000ti,sysc disabled+ P target-module@4000ti,sysc disabled+ P@target-module@6000ti,sysc disabled+0P`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-busJJJ Waplaia0+TPJJJJ J (J(0J0segment@0 simple-bus+P 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_core   Wrevsysca+ P scm@0ti,omap4-scm-coresimple-bus+ Pscm_conf@0syscon+control-phy@300ti,control-phy-usb2Wpower_control-phy@33cti,control-phy-otghs<Wotghs_control^target-module@4000ti,sysc-omap4ti,sysc@Wrev+ P@cm1@0ti,omap4-cm1simple-bus + P clocks+extalt_clkin_cko fixed-clockDpad_clks_src_cko fixed-clock0pad_clks_ck@108oti,gate-clock0pad_slimbus_core_clks_cko fixed-clocksecure_32k_clk_src_cko fixed-clockslimbus_src_clko fixed-clock1slimbus_clk@108oti,gate-clock1 sys_32k_cko fixed-clockvirt_12000000_cko fixed-clockvirt_13000000_cko fixed-clock]@ virt_16800000_cko fixed-clockY virt_19200000_cko fixed-clock$ virt_26000000_cko fixed-clock virt_27000000_cko fixed-clock virt_38400000_cko fixed-clockItie_low_clock_cko fixed-clockutmi_phy_clkout_cko fixed-clockxclk60mhsp1_cko fixed-clockZxclk60mhsp2_cko fixed-clock[xclk60motg_cko fixed-clockdpll_abe_ck@1e0oti,omap4-dpll-m4xen-clock234dpll_abe_x2_ck@1f0oti,omap4-dpll-x2-clock45dpll_abe_m2x2_ck@1f0oti,divider-clock5|6abe_24m_fclkofixed-factor-clock6abe_clk@108oti,divider-clock6 dpll_abe_m3x2_ck@1f4oti,divider-clock5|7core_hsd_byp_clk_mux_ck@12co ti,mux-clock7,8dpll_core_ck@120oti,omap4-dpll-core-clock8 $,(9dpll_core_x2_ckoti,omap4-dpll-x2-clock9:dpll_core_m6x2_ck@140oti,divider-clock:@|dpll_core_m2_ck@130oti,divider-clock90|;ddrphy_ckofixed-factor-clock;dpll_core_m5x2_ck@13coti,divider-clock:<|<div_core_ck@100oti,divider-clock<Gdiv_iva_hs_clk@1dcoti,divider-clock< @div_mpu_hs_clk@19coti,divider-clock< Fdpll_core_m4x2_ck@138oti,divider-clock:8|=dll_clk_div_ckofixed-factor-clock=dpll_abe_m2_ck@1f0oti,divider-clock4|Jdpll_core_m3x2_gate_ck@134o ti,composite-no-wait-gate-clock:4>dpll_core_m3x2_div_ck@134oti,composite-divider-clock:4|?dpll_core_m3x2_ckoti,composite-clock>?dpll_core_m7x2_ck@144oti,divider-clock:D|iva_hsd_byp_clk_mux_ck@1aco ti,mux-clock@Adpll_iva_ck@1a0oti,omap4-dpll-clockA!B17Bdpll_iva_x2_ckoti,omap4-dpll-x2-clockBCdpll_iva_m4x2_ck@1b8oti,divider-clockC|!D1~Ddpll_iva_m5x2_ck@1bcoti,divider-clockC|!E1] Edpll_mpu_ck@160oti,omap4-dpll-clockF`dlhdpll_mpu_m2_ck@170oti,divider-clockp|per_hs_clk_div_ckofixed-factor-clock7Kusb_hs_clk_div_ckofixed-factor-clock7Ql3_div_ck@100oti,divider-clockGHl4_div_ck@100oti,divider-clockHlp_clk_div_ckofixed-factor-clock6mpu_periphclkofixed-factor-clockocp_abe_iclk@528oti,divider-clock I(per_abe_24m_fclkofixed-factor-clockJdummy_cko fixed-clockclockdomainsmpuss_cm@300 ti,omap4-cm+ Pclk@20 ti,clkctrl otesla_cm@400 ti,omap4-cm+ Pclk@20 ti,clkctrl o\abe_cm@500 ti,omap4-cm+ Pclk@20 ti,clkctrl loItarget-module@8000ti,sysc-omap4ti,syscWrev+ P cm2@0ti,omap4-cm2simple-bus + P clocks+per_hsd_byp_clk_mux_ck@14co ti,mux-clockKLLdpll_per_ck@140oti,omap4-dpll-clockL@DLHMdpll_per_m2_ck@150oti,divider-clockMP|Udpll_per_x2_ck@150oti,omap4-dpll-x2-clockMPNdpll_per_m2x2_ck@150oti,divider-clockNP|Tdpll_per_m3x2_gate_ck@154o ti,composite-no-wait-gate-clockNTOdpll_per_m3x2_div_ck@154oti,composite-divider-clockNT|Pdpll_per_m3x2_ckoti,composite-clockOPdpll_per_m4x2_ck@158oti,divider-clockNX|dpll_per_m5x2_ck@15coti,divider-clockN\|dpll_per_m6x2_ck@160oti,divider-clockN`|Sdpll_per_m7x2_ck@164oti,divider-clockNd|dpll_usb_ck@180oti,omap4-dpll-j-type-clockQRdpll_usb_clkdcoldo_ck@1b4oti,fixed-factor-clockRFSdpll_usb_m2_ck@190oti,divider-clockR|Vducati_clk_mux_ck@100o ti,mux-clockGSfunc_12m_fclkofixed-factor-clockTfunc_24m_clkofixed-factor-clockUfunc_24mc_fclkofixed-factor-clockTfunc_48m_fclk@108oti,divider-clockTfunc_48mc_fclkofixed-factor-clockTfunc_64m_fclk@108oti,divider-clockfunc_96m_fclk@108oti,divider-clockTinit_60m_fclk@104oti,divider-clockVYper_abe_nc_fclk@108oti,divider-clockJsha2md5_fck@15c8oti,gate-clockHusb_phy_cm_clk32k@640oti,gate-clock@`clockdomainsl3_init_clkdmti,clockdomainRl4_ao_cm@600 ti,omap4-cm+ Pclk@20 ti,clkctrl obl3_1_cm@700 ti,omap4-cm+ Pclk@20 ti,clkctrl ol3_2_cm@800 ti,omap4-cm+ Pclk@20 ti,clkctrl oducati_cm@900 ti,omap4-cm + P clk@20 ti,clkctrl ol3_dma_cm@a00 ti,omap4-cm + P clk@20 ti,clkctrl oWl3_emif_cm@b00 ti,omap4-cm + P clk@20 ti,clkctrl od2d_cm@c00 ti,omap4-cm + P clk@20 ti,clkctrl oal4_cfg_cm@d00 ti,omap4-cm + P clk@20 ti,clkctrl ocl3_instr_cm@e00 ti,omap4-cm+ Pclk@20 ti,clkctrl $oivahd_cm@f00 ti,omap4-cm+ Pclk@20 ti,clkctrl oiss_cm@1000 ti,omap4-cm+ Pclk@20 ti,clkctrl ogl3_dss_cm@1100 ti,omap4-cm+ Pclk@20 ti,clkctrl ol3_gfx_cm@1200 ti,omap4-cm+ Pclk@20 ti,clkctrl ol3_init_cm@1300 ti,omap4-cm+ Pclk@20 ti,clkctrl oXl4_per_cm@1400 ti,omap4-cm+ Pclk@20 ti,clkctrl Dohtarget-module@56000ti,sysc-omap2ti,sysc dma_system``,`(Wrevsyscsyss# a a Wfck+ P`dma-controller@0ti,omap4430-sdma0@  oz xtarget-module@58000ti,sysc-omap2ti,syschsiWrevsyscsyss#aa Xfck+ PPhsi@0 ti,omap4-hsi@PWsysgdd Xhsi_fck @Ggdd_mpu+ P@hsi-port@2000ti,omap4-hsi-port (Wtxrx @Chsi-port@3000ti,omap4-hsi-port08Wtxrx @Dtarget-module@5e000ti,sysc disabled+ P target-module@62000ti,sysc-omap2ti,sysc usb_tll_hs   Wrevsyscsyss a XHfck+ P usbhstll@0 ti,usbhs-tll @Ntarget-module@64000ti,sysc-omap4ti,sysc usb_host_hs@@@Wrevsyscsyssaa X8fck+ P@usbhshost@0ti,usbhs-host+ P YZ[3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2ohci@800ti,ohci-omap3 @Lehci@c00 ti,ehci-omap  @Mtarget-module@66000ti,sysc-omap2ti,syscmmu_dsp```Wrevsyscsyss a \fck+ P` disabledsegment@80000 simple-bus+P      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ Ptarget-module@2b000ti,sysc-omap2ti,sysc usb_otg_hsWrevsyscsyss aa X@fck+ Pusb_otg_hs@0ti,omap4-musb@\]mcdma]] usb2-phy ^ 2target-module@2d000ti,sysc-omap2ti,syscocp2scp_usb_phyWrevsyscsyss a Xfck+ Pocp2scp@0ti,omap-ocp2scp+ Pusb2phy@80 ti,omap-usb2X_`wkupclk]target-module@36000ti,sysc-omap2ti,sysc```Wrevsyscsyssa afck+ P`target-module@4d000ti,sysc-omap2ti,syscWrevsyscsyssa afck+ Ptarget-module@59000ti,sysc-omap4-srti,syscsmartreflex_mpu8Wsysca bfck+ Psmartreflex@0ti,omap4-smartreflex-mpu @target-module@5b000ti,sysc-omap4-srti,syscsmartreflex_iva8Wsysca bfck+ Psmartreflex@0ti,omap4-smartreflex-iva @ftarget-module@5d000ti,sysc-omap4-srti,syscsmartreflex_core8Wsysca bfck+ Psmartreflex@0ti,omap4-smartreflex-core @target-module@60000ti,sysc disabled+ Ptarget-module@74000ti,sysc-omap4ti,syscmailbox@@ Wrevsysc a cfck+ P@mailbox@0ti,omap4-mailbox @ ,>mbox_ipu P [mbox_dsp P [target-module@76000ti,sysc-omap2ti,sysc spinlock```Wrevsyscsyss a cfck+ P`spinlock@0ti,omap4-hwspinlockfsegment@100000 simple-bus+`P  00target-module@0ti,sysc-omap4ti,syscctrl_module_pad_core Wrevsysca+ Ppinmux@40 ti,omap4-padconfpinctrl-single@+m|tdefaultdeipinmux_mcpdm_pins(pinmux_uart2_pins lpinmux_uart3_pins jpinmux_uart4_pinsmpinmux_twl6040_pins`rpinmux_dmic_pins pinmux_mcbsp1_pins pinmux_mcbsp2_pins pinmux_mcspi1_pins ypinmux_dss_hdmi_pinsZ\^dpinmux_tpd12s015_pins"HX epinmux_i2c1_pinsnpinmux_i2c2_pinswpinmux_i2c3_pinskpinmux_i2c4_pinspinmux_wl12xx_gpio<pinmux_wl12xx_pins8:  pinmux_enet_enable_gpio0 pinmux_ks8851_pinszpinmux_twl6030_pins^Aoomap4_padconf_global@5a0sysconsimple-busp+ Ppfpbias_regulator@60ti,pbias-omap4ti,pbias-omap`fpbias_mmc_omap4pbias_mmc_omap4w@-~target-module@2000ti,sysc disabled+ P target-module@8000ti,sysc disabled+ Ptarget-module@a000ti,sysc-omap4ti,syscfdif Wrevsysc a a gfck+ Psegment@180000 simple-bus+segment@200000 simple-bus+hP!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc disabled+ P@target-module@6000ti,sysc disabled+ P`target-module@a000ti,sysc disabled+ Ptarget-module@c000ti,sysc disabled+ Ptarget-module@10000ti,sysc disabled+ Ptarget-module@12000ti,sysc disabled+ P target-module@14000ti,sysc disabled+ P@target-module@16000ti,sysc disabled+ P`target-module@18000ti,sysc disabled+ Ptarget-module@1c000ti,sysc disabled+ Ptarget-module@1e000ti,sysc disabled+ Ptarget-module@20000ti,sysc disabled+ Ptarget-module@26000ti,sysc disabled+ P`target-module@28000ti,sysc disabled+ Ptarget-module@2a000ti,sysc disabled+ Psegment@280000 simple-bus+segment@300000 simple-bus+P042@@2@ `2`p2p2232 2@target-module@0ti,sysc disabled+xP@@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-bus0HHHHHHWaplaia0ia1ia2ia3+PH H segment@0 simple-bus+P  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXWrevsyscsyssa h0fck+ Pserial@0ti,omap4-uart @JlJitdefaultjtarget-module@32000ti,sysc-omap2-timerti,sysctimer2   Wrevsyscsyss' a hfck+ P timer@0ti,omap3430-timer hfck @&target-module@34000ti,sysc-omap4-timerti,sysctimer3@@ Wrevsysca h fck+ P@timer@0ti,omap4430-timer h fck @'target-module@36000ti,sysc-omap4-timerti,sysctimer4`` Wrevsysca h(fck+ P`timer@0ti,omap4430-timer h(fck @(target-module@3e000ti,sysc-omap4-timerti,sysctimer9 Wrevsysca h0fck+ Ptimer@0ti,omap4430-timer h0fck @-target-module@40000ti,sysc disabled+ Ptarget-module@55000ti,sysc-omap2ti,syscgpio2PPQWrevsyscsyssah@h@ fckdbclk+ PPgpio@0ti,omap4-gpio @{target-module@57000ti,sysc-omap2ti,syscgpio3ppqWrevsyscsyssahHhH fckdbclk+ Ppgpio@0ti,omap4-gpio @target-module@59000ti,sysc-omap2ti,syscgpio4WrevsyscsyssahPhP fckdbclk+ Pgpio@0ti,omap4-gpio @ starget-module@5b000ti,sysc-omap2ti,syscgpio5WrevsyscsyssahXhX fckdbclk+ Pgpio@0ti,omap4-gpio @!}target-module@5d000ti,sysc-omap2ti,syscgpio6Wrevsyscsyssah`h` fckdbclk+ Pgpio@0ti,omap4-gpio @"target-module@60000ti,sysc-omap2ti,syscWrevsyscsyssa hfck+ Pi2c@0 ti,omap4-i2c @=+tdefaultktmp105@48 ti,tmp105Hbh1780@29 rohm,bh1780)target-module@6a000ti,sysc-omap2ti,syscPTXWrevsyscsyssa h fck+ Pserial@0ti,omap4-uart @Hltarget-module@6c000ti,sysc-omap2ti,syscPTXWrevsyscsyssa h(fck+ Pserial@0ti,omap4-uart @IlIitdefaultltarget-module@6e000ti,sysc-omap2ti,syscPTXWrevsyscsyssa h8fck+ Pserial@0ti,omap4-uart @FlFitdefaultmtarget-module@70000ti,sysc-omap2ti,syscWrevsyscsyssa hfck+ Pi2c@0 ti,omap4-i2c @8+tdefaultntwl@48H @ ti,twl6030tdefaultoprtcti,twl4030-rtc@ regulator-vaux1ti,twl6030-vaux1B@-regulator-vaux2ti,twl6030-vaux2O*regulator-vaux3ti,twl6030-vaux3B@-regulator-vmmcti,twl6030-vmmcO-regulator-vppti,twl6030-vppw@&%regulator-vusimti,twl6030-vusimO,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxioregulator-vusbti,twl6030-vusbqregulator-v1v8ti,twl6030-v1v8tregulator-v2v1ti,twl6030-v2v1uusb-comparatorti,twl6030-usb@ qpwmti,twl6030-pwm#pwmledti,twl6030-pwmled#gpadcti,twl6030-gpadc@.twl@4b ti,twl6040oKtdefaultr @w @sQt\uh{vvvibra  target-module@72000ti,sysc-omap2ti,sysc   Wrevsyscsyssa hfck+ P i2c@0 ti,omap4-i2c @9+tdefaultwtarget-module@76000ti,sysc-omap4ti,sysc slimbus2`` Wrevsysca hfck+ P`target-module@78000ti,sysc-omap2ti,syscelmWrevsyscsyss a h8fck+ Pelm@0ti,am3352-elm  @ disabledtarget-module@86000ti,sysc-omap2-timerti,sysctimer10```Wrevsyscsyss' a hfck+ P`timer@0ti,omap3430-timer hfck @.target-module@88000ti,sysc-omap4-timerti,sysctimer11 Wrevsysca hfck+ Ptimer@0ti,omap4430-timer hfck @/target-module@90000ti,sysc disabled+ P target-module@96000ti,sysc-omap2ti,syscmcbsp4 `Wsysc a hfck+ P `mcbsp@0ti,omap4-mcbspWmpu @commonxx txrx disabledtarget-module@98000ti,sysc-omap4ti,syscmcspi1   Wrevsysca hfck+ P spi@0ti,omap4-mcspi @A+@x#x$x%x&x'x(x)x* tx0rx0tx1rx1tx2rx2tx3rx3tdefaultyeth@0tdefaultzks8851n6 {@| "} target-module@9a000ti,sysc-omap4ti,syscmcspi2   Wrevsysca hfck+ P spi@0ti,omap4-mcspi @B+ x+x,x-x.tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,sysc   Wrevsyscaa Xfck+ P mmc@0ti,omap4-hsmmc @S.;x=x>txrxR~_ktarget-module@9e000ti,sysc disabled+ P target-module@a2000ti,sysc disabled+ P target-module@a4000ti,sysc disabled+P @ Ptarget-module@a8000ti,sysc disabled+ P @target-module@ad000ti,sysc-omap4ti,sysc   Wrevsyscaa hfck+ P mmc@0ti,omap4-hsmmc @^;xMxNtxrx disabledtarget-module@b0000ti,sysc disabled+ P target-module@b2000ti,sysc-omap2ti,syschdq1w   Wrevsyscsyssu hhfck+ P 1w@0 ti,omap3-1w @:target-module@b4000ti,sysc-omap4ti,sysc @ @ Wrevsyscaa Xfck+ P @mmc@0ti,omap4-hsmmc @V;x/x0txrx_ktarget-module@b8000ti,sysc-omap4ti,syscmcspi3   Wrevsysca hfck+ P spi@0ti,omap4-mcspi @[+xxtx0rx0target-module@ba000ti,sysc-omap4ti,syscmcspi4   Wrevsysca hfck+ P spi@0ti,omap4-mcspi @0+xFxGtx0rx0target-module@d1000ti,sysc-omap4ti,sysc   Wrevsyscaa hfck+ P mmc@0ti,omap4-hsmmc @`;x9x:txrx disabledtarget-module@d5000ti,sysc-omap4ti,sysc P P Wrevsyscaa h@fck+ P Pmmc@0ti,omap4-hsmmc @;;x;x<txrxtdefault_k+wlcore@2 ti,wl1281 @segment@200000 simple-bus+P55target-module@150000ti,sysc-omap2ti,syscWrevsyscsyssa hfck+ Pi2c@0 ti,omap4-i2c @>+tdefaulthmc5843@1ehoneywell,hmc5843interconnect@40100000ti,omap4-l4-abesimple-bus@@Wlaap+P@IIsegment@0 simple-bus+0P  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,syscmcbsp1 Wsysc a I(fck+P I I mcbsp@0ti,omap4-mcbspI Wmpudma @commonx!x"txrxokaytdefaulttarget-module@24000ti,sysc-omap2ti,syscmcbsp2@Wsysc a I0fck+P@I@I@mcbsp@0ti,omap4-mcbspI@Wmpudma @commonxxtxrxokaytdefaulttarget-module@26000ti,sysc-omap2ti,syscmcbsp3`Wsysc a I8fck+P`I`I`mcbsp@0ti,omap4-mcbspI`Wmpudma @commonxxtxrx disabledtarget-module@28000ti,sysc-mcaspti,syscmcasp Wrevsysca I fck+PIItarget-module@2a000ti,sysc disabled+PIItarget-module@2e000ti,sysc-omap4ti,syscdmic Wrevsysca Ifck+PIIdmic@0ti,omap4-dmicIWmpudma @rxCup_linkokaytdefaulttarget-module@30000ti,sysc-omap2ti,syscWrevsyscsyss"a Ihfck+PIIwdt@0ti,omap4-wdtti,omap3-wdt @Ptarget-module@32000ti,sysc-omap4ti,syscmcpdm   Wrevsysca Ifck+P I I okaytdefaultmcpdm@0ti,omap4-mcpdmI Wmpudma @pxAxBup_linkdn_linkpdmclktarget-module@38000ti,sysc-omap4-timerti,sysctimer5 Wrevsysca IHfck+PIItimer@0ti,omap4430-timerI IHfck @)target-module@3a000ti,sysc-omap4-timerti,sysctimer6 Wrevsysca IPfck+PIItimer@0ti,omap4430-timerI IPfck @*target-module@3c000ti,sysc-omap4-timerti,sysctimer7 Wrevsysca IXfck+PIItimer@0ti,omap4430-timerI IXfck @+target-module@3e000ti,sysc-omap4-timerti,sysctimer8 Wrevsysca I`fck+PIItimer@0ti,omap4430-timerI I`fck @,target-module@80000ti,sysc disabled+PIItarget-module@a0000ti,sysc disabled+P I I target-module@c0000ti,sysc disabled+P I I target-module@f1000ti,sysc-omap4ti,syscaess Wrevsysca a Ifck+PIIocmcram@40304000 mmio-sram@0@gpmc@50000000ti,omap4430-gpmcP+ @xrxtxgpmcHfckmmu@4a066000ti,omap4-iommuJ` @mmu_dsptarget-module@52000000ti,sysc-omap4ti,syscissRR Wrevsyscaa gfck+ PRmmu@55082000ti,omap4-iommuU  @dmmu_ipu!target-module@4012c000ti,sysc-omap4ti,sysc slimbus1@@ Wrevsysca I@fck+P@IIdmm@4e000000 ti,omap4-dmmN @qdmmemif@4c000000 ti,emif-4dL @nemif17@Wlemif@4d000000 ti,emif-4dM @oemif27@Wlaes@4b501000 ti,omap4-aesaes1KP @Uxoxntxrxaes@4b701000 ti,omap4-aesaes2Kp @@xrxqtxrxdes@480a5000 ti,omap4-desdesH P @Rxuxttxrxsham@4b100000ti,omap4-shamshamK @3xwrxregulator-abb-mpu ti,abb-v2abb_mpu+2okayJ0{J0`Wbase-addressint-addressxO1regulator-abb-iva ti,abb-v2abb_iva+2 disabledJ0{J0`Wbase-addressint-addresstarget-module@56000000ti,sysc-omap4ti,syscVV Wrevsyscaa fck+ PVdss@58000000 ti,omap4-dssXok dss_core fck+Pdispc@58001000ti,omap4-dispcX @ dss_dispc fckencoder@58002000ti,omap4-rfbiX  disabled dss_rfbiHfckickencoder@58003000ti,omap4-vencX0 disabled dss_venc fckencoder@58004000 ti,omap4-dsiX@XB@XC Wprotophypll @5ok dss_dsi1  fcksys_clkportendpointdisplaytpo,taalpanel-dsi-cmlcd0 "sportendpointencoder@58005000 ti,omap4-dsiXPXR@XS Wprotophypll @Tok dss_dsi2  fcksys_clkportendpointdisplaytpo,taalpanel-dsi-cmlcd1 "sportendpointencoder@58006000ti,omap4-hdmi X`XbXcXdWwppllphycore @eok dss_hdmi  fcksys_clkxL audio_txportendpointbandgap@4a002260J"`J#,ti,omap4430-bandgapthermal-zonescpu_thermal0>NN tripscpu_alert[gpassivecpu_crit[Hg criticalcooling-mapsmap0r wlpddr2#Elpida,ECB240ABACNjedec,lpddr2-s4    lpddr2-timings@0jedec,lpddr2-timings * 3ׄ <R BFP G: K T' YL ^L bL g: n| yP ~_ ~@ B@ p plpddr2-timings@1jedec,lpddr2-timings * 3  <R BFP G: K T' Y' ^L bL g: n| yP ~_ ~@ B@ p pmemory@80000000memory@fixedregulator-vdd-ethtdefaultregulator-fixedVDD_ETH2Z2Z L{h  a|fixedregulator-vbatregulator-fixedVBAT98p98p vleds gpio-ledsdebug0omap4:green:debug0 ({debug1omap4:green:debug1 (debug2omap4:green:debug2 (debug3omap4:green:debug3 (debug4omap4:green:debug4 ({user1omap4:blue:user ( user2omap4:red:user ( user3omap4:green:user (} pwmleds pwm-ledskpadomap4::keypad w5 chargingomap4:green:chrg w5 backlightpwm-backlight w58 (2<FPZdnx soundti,abe-twl6040 SDP4430  .I ; D L{ WHeadset StereophoneHSOLHeadset StereophoneHSOREarphone SpkEPExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRVibratorVIBRALVibratorVIBRARHSMICHeadset MicHeadset MicHeadset Mic BiasMAINMICMain Handset MicMain Handset MicMain Mic BiasSUBMICSub Handset MicSub Handset MicMain Mic BiasAFMLLine InAFMRLine InDMicDigital MicDigital MicDigital Mic1 Biaswl12xx_vmmctdefaultregulator-fixedvwl1271w@w@ L{ phencoder ti,tpd12s015$({{ {ports+port@0endpointport@1endpointconnectorhdmi-connectorhdmicportendpoint compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3display0display1display2device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptssramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividersti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,timer-alwonkeypad,num-rowskeypad,num-columnslinux,keymaplinux,input-no-autorepeat#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clocksassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesremote-wakeup-connectedusb-phyphysphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typemodepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highvddvibl-supplyvddvibr-supplyti,vibldrv-resti,vibrdrv-resti,viblmotor-resti,vibrmotor-resti,buffer-sizedmasdma-namesti,spi-num-csspi-max-frequencyvdd-supplyreset-gpiosti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,no-reset-on-initti,non-removablecap-power-off-cardref-clock-frequencytcxo-clock-frequencyti,timer-dspgpmc,num-csgpmc,num-waitpinsti,no-idle-on-init#iommu-cellsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertcs1-useddevice-handleti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_inforemote-endpointlaneslabelvdda-supply#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicedensityio-widthtRPab-min-tcktRCD-min-tcktWR-min-tcktRASmin-min-tcktRRD-min-tcktWTR-min-tcktXP-min-tcktRTP-min-tcktCKE-min-tcktCKESR-min-tcktFAW-min-tckmin-freqmax-freqtRPabtRCDtWRtRAS-mintRRDtWTRtXPtRTPtCKESRtDQSCK-maxtFAWtZQCStZQCLtZQinittRAS-max-nstDQSCK-max-deratedregulator-boot-onstartup-delay-uspwmsmax-brightnessbrightness-levelsdefault-brightness-levelti,modelti,jack-detectionti,mclk-freqti,mcpdmti,dmicti,twl6040ti,audio-routing