2;8(( G(6compulab,omap5-sbc-t54compulab,omap5-cm-t54ti,omap5&7CompuLab CM-T54 on SB-T54chosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0?L/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0BV/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0B^/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bf/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bn/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0Bv/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0B~/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0 /connector0 /connector1 /displaycpuscpu@0cpuarm,cortex-a15B@,`cpucpu@1cpuarm,cortex-a15B@,`cputhermal-zonescpu_thermal*:Atripscpu_alertGSpassivecpu_critGHS criticalcooling-mapsmap0^ cgpu_thermal*:uPtripsgpu_critGHS criticalcore_thermal*:tripscore_critGHS criticaltimerarm,armv7-timer0r   &pmuarm,cortex-a15-pmurinterrupt-controller@48211000arm,cortex-a15-gic}@H!H! H!@ H!` &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpu}H(&socti,omap-inframpu ti,omap4-mpumpuocpti,omap5-l3-nocsimple-busl3_main_1l3_main_2l3_main_30D D0E@r  interconnect@4ae00000ti,omap5-l4-wkupsimple-busJJJ aplaia0$JJJsegment@0 simple-bus`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc counter_32k@@ revsysc 0fck @counter@0ti,omap-counter32k@target-module@6000ti,sysc-omap4ti,sysc`rev ` prm@0ti,omap5-prmsimple-bus  r   clockssys_clkin@110 ti,mux-clock abe_dpll_bypass_clk_mux@108 ti,mux-clock1abe_dpll_clk_mux@10c ti,mux-clock 0custefuse_sys_gfclk_divfixed-factor-clockdss_syc_gfclk_divfixed-factor-clockHwkupaon_iclk_mux@108 ti,mux-clockl3instr_ts_gclk_divfixed-factor-clockclockdomainswkupaon_cm@1900 ti,omap4-cm clk@20 ti,clkctrl \ target-module@a000ti,sysc-omap4ti,syscrev scrm@0ti,omap5-scrmclocksauxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clock auxclk0_src_mux_ck@310ti,composite-mux-clock  auxclk0_src_ckti,composite-clockauxclk0_ck@310ti,divider-clock &auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clock auxclk1_src_mux_ck@314ti,composite-mux-clock  auxclk1_src_ckti,composite-clockauxclk1_ck@314ti,divider-clock 'auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clock auxclk2_src_mux_ck@318ti,composite-mux-clock  auxclk2_src_ckti,composite-clockauxclk2_ck@318ti,divider-clock (auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clock  auxclk3_src_mux_ck@31cti,composite-mux-clock  !auxclk3_src_ckti,composite-clock !"auxclk3_ck@31cti,divider-clock" )auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clock  #auxclk4_src_mux_ck@320ti,composite-mux-clock   $auxclk4_src_ckti,composite-clock#$%auxclk4_ck@320ti,divider-clock%  *auxclkreq0_ck@210 ti,mux-clock&'()* auxclkreq1_ck@214 ti,mux-clock&'()* auxclkreq2_ck@218 ti,mux-clock&'()* auxclkreq3_ck@21c ti,mux-clock&'()* clockdomainstarget-module@c000ti,sysc-omap4ti,syscrev pinmux@840 ti,omap5-padconfpinctrl-single@<"}1Opinmux_ads7846_pinslupinmux_palmas_sys_nirq_pinsl(oomap5_scm_wkup_pad_conf@da0&ti,omap5-scm-wkup-pad-confsimple-bus ` `scm_conf@0sysconsimple-bus` `clocks@0fref_xtal_ckti,gate-clock segment@10000 simple-bus`@@PPtarget-module@0ti,sysc-omap2ti,syscgpio1revsyscsyss   fckdbclk gpio@0ti,omap4-gpio r}wtarget-module@4000ti,sysc-omap2ti,sysc wd_timer2@@@revsyscsyss" fck @wdt@0ti,omap5-wdtti,omap3-wdt rPtarget-module@8000ti,sysc-omap4-timerti,sysctimer1 revsysc fck timer@0ti,omap5430-timer fck r%target-module@c000ti,sysc-omap2ti,sysckbd revsysc"  Xfck keypad@0ti,omap4-keypadsegment@20000 simple-bus``  00pptarget-module@0ti,sysc disabled target-module@2000ti,sysc disabled  target-module@6000ti,sysc disabledH`p (*0interconnect@4a000000ti,omap5-l4-cfgsimple-busJJJ aplaia0TJJJJ J (J(0J0segment@0 simple-bush 00@@PP``pp  00 ``pp @@PP@@@PP``target-module@2000ti,sysc-omap4ti,sysc rev  scm@0ti,omap5-scm-coresimple-bus scm_conf@0sysconjscm@800%ti,omap5-scm-padconf-coresimple-bus pinmux@40 ti,omap5-padconfpinctrl-single@"}1Odefault+,pinmux_led_gpio_pinslp+pinmux_i2c1_pinslnpinmux_i2c2_pinslxzqpinmux_mmc1_pins0lypinmux_mmc2_pinsPl  pinmux_mmc3_pins0ldfhjln}pinmux_wlan_gpios_pinsl\^~pinmux_usbhost_pins0lhv,pinmux_dss_hdmi_pinslpinmux_lcd_pinsl2pinmux_hdmi_conn_pinslpinmux_dss_dpi_pinslpinmux_mcspi1_pins ltpinmux_i2c4_pinslrpinmux_mmc1_aux_pinsl46zomap5_padconf_global@5a0sysconsimple-bus -pbias_regulator@60ti,pbias-omap5ti,pbias-omap`-pbias_mmc_omap5pbias_mmc_omap5 w@$2Zxtarget-module@4000ti,sysc-omap4ti,sysc@rev @cm_core_aon@0 ti,omap5-cm-core-aonsimple-bus  clockspad_clks_src_ck fixed-clock<.pad_clks_ck@108ti,gate-clock. Ksecure_32k_clk_src_ck fixed-clock<slimbus_src_clk fixed-clock</slimbus_clk@108ti,gate-clock/ Esys_32k_ck fixed-clock<virt_12000000_ck fixed-clock< virt_13000000_ck fixed-clock<]@ virt_16800000_ck fixed-clock<Y virt_19200000_ck fixed-clock<$ virt_26000000_ck fixed-clock<virt_27000000_ck fixed-clock<virt_38400000_ck fixed-clock<Ixclk60mhsp1_ck fixed-clock<exclk60mhsp2_ck fixed-clock<fdpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock012dpll_abe_x2_ckti,omap4-dpll-x2-clock23dpll_abe_m2x2_ck@1f0ti,divider-clock34abe_24m_fclkfixed-factor-clock4Gabe_clk@108ti,divider-clock4LFabe_iclk@528ti,divider-clock5 (babe_lp_clk_divfixed-factor-clock4dpll_abe_m3x2_ck@1f4ti,divider-clock36dpll_core_byp_mux@12c ti,mux-clock6 ,7dpll_core_ck@120ti,omap4-dpll-core-clock7 $,(8dpll_core_x2_ckti,omap4-dpll-x2-clock89dpll_core_h21x2_ck@150ti,divider-clock9?P:c2c_fclkfixed-factor-clock:;c2c_iclkfixed-factor-clock;dpll_core_h11x2_ck@138ti,divider-clock9?8dpll_core_h12x2_ck@13cti,divider-clock9?<<dpll_core_h13x2_ck@140ti,divider-clock9?@dpll_core_h14x2_ck@144ti,divider-clock9?D\dpll_core_h22x2_ck@154ti,divider-clock9?Tdpll_core_h23x2_ck@158ti,divider-clock9?Xdpll_core_h24x2_ck@15cti,divider-clock9?\dpll_core_m2_ck@130ti,divider-clock80dpll_core_m3x2_ck@134ti,divider-clock94iva_dpll_hs_clk_divfixed-factor-clock<=dpll_iva_byp_mux@1ac ti,mux-clock= >dpll_iva_ck@1a0ti,omap4-dpll-clock>n?~Ep}@?dpll_iva_x2_ckti,omap4-dpll-x2-clock?@dpll_iva_h11x2_ck@1b8ti,divider-clock@?nA~`Adpll_iva_h12x2_ck@1bcti,divider-clock@?nB~$Bmpu_dpll_hs_clk_divfixed-factor-clock<Cdpll_mpu_ck@160ti,omap5-mpu-dpll-clockC`dlhdpll_mpu_m2_ck@170ti,divider-clockpper_dpll_hs_clk_divfixed-factor-clock6Lusb_dpll_hs_clk_divfixed-factor-clock6Rl3_iclk_div@100ti,divider-clock <LDgpu_l3_iclkfixed-factor-clockDl4_root_clk_div@100ti,divider-clock DLslimbus1_slimbus_clk@560ti,gate-clockE `aess_fclk@528ti,divider-clockF (5mcasp_sync_mux_ck@540 ti,mux-clock GHI @Jmcasp_gfclk@540 ti,mux-clock JKE @dummy_ck fixed-clock<clockdomainsmpu_cm@300 ti,omap4-cm clk@20 ti,clkctrl dsp_cm@400 ti,omap4-cm clk@20 ti,clkctrl iabe_cm@500 ti,omap4-cm clk@20 ti,clkctrl dtarget-module@8000ti,sysc-omap4ti,syscrev  cm_core@0ti,omap5-cm-coresimple-bus   clocksdpll_per_byp_mux@14c ti,mux-clockL LMdpll_per_ck@140ti,omap4-dpll-clockM@DLHNdpll_per_x2_ckti,omap4-dpll-x2-clockNOdpll_per_h11x2_ck@158ti,divider-clockO?XUdpll_per_h12x2_ck@15cti,divider-clockO?\dpll_per_h14x2_ck@164ti,divider-clockO?d]dpll_per_m2_ck@150ti,divider-clockNPWdpll_per_m2x2_ck@150ti,divider-clockOPVdpll_per_m3x2_ck@154ti,divider-clockOTdpll_unipro1_ck@200ti,omap4-dpll-clock Pdpll_unipro1_clkdcoldofixed-factor-clockPZdpll_unipro1_m2_ck@210ti,divider-clockP[dpll_unipro2_ck@1c0ti,omap4-dpll-clockQdpll_unipro2_clkdcoldofixed-factor-clockQdpll_unipro2_m2_ck@1d0ti,divider-clockQdpll_usb_byp_mux@18c ti,mux-clockR Sdpll_usb_ck@180ti,omap4-dpll-j-type-clockSTdpll_usb_clkdcoldofixed-factor-clockTdpll_usb_m2_ck@190ti,divider-clockTXfunc_128m_clkfixed-factor-clockUfunc_12m_fclkfixed-factor-clockVfunc_24m_clkfixed-factor-clockWIfunc_48m_fclkfixed-factor-clockVfunc_96m_fclkfixed-factor-clockVYl3init_60m_fclk@104ti,divider-clockXbdiss_ctrlclk@1320ti,gate-clockY  lli_txphy_clk@f20ti,gate-clockZ  lli_txphy_ls_clk@f20ti,gate-clock[  usb_phy_cm_clk32k@640ti,gate-clock @kfdif_fclk@1328ti,divider-clockU (gpu_core_gclk_mux@1520 ti,mux-clock\]  gpu_hyd_gclk_mux@1520 ti,mux-clock\]  hsi_fclk@1638ti,divider-clockV 8clockdomainsl3init_clkdmti,clockdomainTl3main1_cm@700 ti,omap4-cm clk@20 ti,clkctrl l3main2_cm@800 ti,omap4-cm clk@20 ti,clkctrl ipu_cm@900 ti,omap4-cm   clk@20 ti,clkctrl dma_cm@a00 ti,omap4-cm   clk@20 ti,clkctrl cemif_cm@b00 ti,omap4-cm   clk@20 ti,clkctrl l4cfg_cm@d00 ti,omap4-cm   clk@20 ti,clkctrl ll3instr_cm@e00 ti,omap4-cm clk@20 ti,clkctrl l4per_cm@1000 ti,omap4-cm clk@20 ti,clkctrl \mdss_cm@1400 ti,omap4-cm clk@20 ti,clkctrl gpu_cm@1500 ti,omap4-cm clk@20 ti,clkctrl l3init_cm@1600 ti,omap4-cm clk@20 ti,clkctrl ^target-module@20000ti,sysc-omap4ti,sysc usb_otg_ss revsysc ^fck omap_dwc3@0ti,dwc3 r] _`dwc3@10000 snps,dwc3$r\\]peripheralhostotgabusb2-phyusb3-phy peripheraltarget-module@56000ti,sysc-omap2ti,sysc dma_system``,`(revsyscsyss#   cfck `dma-controller@0ti,omap4430-sdma0r   starget-module@58000ti,sysc disabled0 0target-module@5e000ti,sysc disabled  target-module@62000ti,sysc-omap2ti,sysc usb_tll_hs   revsyscsyss  ^Hfck  usbhstll@0 ti,usbhs-tll rNtarget-module@64000ti,sysc-omap4ti,sysc usb_host_hs@@ revsysc ^8fck @usbhshost@0ti,usbhs-host  def3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2  ehci-hsic ehci-hsicohci@800ti,ohci-omap3 rL ehci@c00 ti,ehci-omap  rM ghtarget-module@66000ti,sysc-omap2ti,syscmmu_dsp```revsyscsyss  ifck ` disabledtarget-module@70000ti,sysc disabled @target-module@75000ti,sysc disabled Psegment@80000 simple-bus      @@PP``pp` `p p  @@@PP``pp @@ @P P` `p p  @@ @P P` `p p target-module@0ti,sysc-omap2ti,sysc ocp2scp1revsyscsyss  ^fck<@@@PP``ppocp2scp@0ti,omap-ocp2scp usb2phy@4000 ti,omap-usb2@|8jk^wkupclkrefclkIausb3phy@4400 ti,omap-usb3DHdL@phy_rxphy_txpll_ctrl8jpk^wkupclksysclkrefclkIbtarget-module@10000ti,sysc-omap2ti,sysc ocp2scp3revsyscsyss  ^fck<@@@PP``ppocp2scp@0ti,omap-ocp2scp phy@6000ti,phy-pipe3-sata`ddh@phy_rxphy_txpll_ctrl8jt^hsysclkrefclkItarget-module@20000ti,sysc disabled<@@@PP``pptarget-module@36000ti,sysc disabled `target-module@4d000ti,sysc disabled target-module@59000ti,sysc disabled target-module@5b000ti,sysc disabled target-module@5d000ti,sysc disabled target-module@60000ti,sysc disabled target-module@74000ti,sysc-omap4ti,syscmailbox@@ revsysc  lfck @mailbox@0ti,omap4-mailbox rT`rmbox_ipu  mbox_dsp  target-module@76000ti,sysc-omap2ti,sysc spinlock```revsyscsyss  lfck `spinlock@0ti,omap4-hwspinlocksegment@100000 simple-bus`  00target-module@2000ti,sysc disabled  target-module@8000ti,sysc disabled target-module@a000ti,sysc disabled target-module@40000ti,sysc disabled segment@180000 simple-bussegment@200000 simple-bus!!  ` `p p@ @P P ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!!!@"@P"P 0 0   " 0"0target-module@2000ti,sysc disabled  target-module@4000ti,sysc disabled @target-module@6000ti,sysc disabled `target-module@8000ti,sysc disabled target-module@a000ti,sysc disabled target-module@c000ti,sysc disabled target-module@10000ti,sysc disabled target-module@12000ti,sysc disabled  target-module@14000ti,sysc disabled @target-module@16000ti,sysc disabled `target-module@18000ti,sysc disabled target-module@1a000ti,sysc disabled target-module@1c000ti,sysc disabled target-module@1e000ti,sysc disabled target-module@20000ti,sysc disabled target-module@22000ti,sysc disabled  target-module@24000ti,sysc disabled @target-module@26000ti,sysc disabled `target-module@28000ti,sysc disabled target-module@2a000ti,sysc disabled segment@280000 simple-bussegment@300000 simple-businterconnect@48000000ti,omap5-l4-persimple-bus0HHHHHHaplaia0ia1ia2ia3H H segment@0 simple-bus  00@@PP``ppPP``pp  0000@@  0 0``pp          @ @ ` ` @   ``pp @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscuart3PTXrevsyscsyss m0fck serial@0ti,omap4-uart rJ<ltarget-module@32000ti,sysc-omap4-timerti,sysctimer2   revsysc mfck  timer@0ti,omap5430-timer mfck r&target-module@34000ti,sysc-omap4-timerti,sysctimer3@@ revsysc m fck @timer@0ti,omap5430-timer m fck r'target-module@36000ti,sysc-omap4-timerti,sysctimer4`` revsysc m(fck `timer@0ti,omap5430-timer m(fck r(target-module@3e000ti,sysc-omap4-timerti,sysctimer9 revsysc m0fck timer@0ti,omap5430-timer m0fck r-target-module@51000ti,sysc-omap2ti,syscgpio7revsyscsyssmm fckdbclk gpio@0ti,omap4-gpio r#}target-module@53000ti,sysc-omap2ti,syscgpio8001revsyscsyssmm fckdbclk 0gpio@0ti,omap4-gpio ry}|target-module@55000ti,sysc-omap2ti,syscgpio2PPQrevsyscsyssm@m@ fckdbclk Pgpio@0ti,omap4-gpio r}target-module@57000ti,sysc-omap2ti,syscgpio3ppqrevsyscsyssmHmH fckdbclk pgpio@0ti,omap4-gpio r}target-module@59000ti,sysc-omap2ti,syscgpio4revsyscsyssmPmP fckdbclk gpio@0ti,omap4-gpio r }target-module@5b000ti,sysc-omap2ti,syscgpio5revsyscsyssmXmX fckdbclk gpio@0ti,omap4-gpio r!}target-module@5d000ti,sysc-omap2ti,syscgpio6revsyscsyssm`m` fckdbclk gpio@0ti,omap4-gpio r"}target-module@60000ti,sysc-omap2ti,sysci2c3revsyscsyss mfck i2c@0 ti,omap4-i2c r=target-module@66000ti,sysc-omap2ti,syscuart5`P`T`Xrevsyscsyss mPfck `serial@0ti,omap4-uart ri<ltarget-module@68000ti,sysc-omap2ti,syscuart6PTXrevsyscsyss mXfck serial@0ti,omap4-uart rj<ltarget-module@6a000ti,sysc-omap2ti,syscuart1PTXrevsyscsyss m fck serial@0ti,omap4-uart rH<ltarget-module@6c000ti,sysc-omap2ti,syscuart2PTXrevsyscsyss m(fck serial@0ti,omap4-uart rI<ltarget-module@6e000ti,sysc-omap2ti,syscuart4PTXrevsyscsyss m8fck serial@0ti,omap4-uart rF<ltarget-module@70000ti,sysc-omap2ti,sysci2c1revsyscsyss mfck i2c@0 ti,omap4-i2c r8defaultn<at24@50 atmel,24c02Ppalmas@48 ti,palmasHodefault r}ppalmas_usbti,palmas-usb-vid _rtcti,palmas-rtc&prpalmas_pmicti,palmas-pmic&pr short-irqregulatorssmps123smps123 '$`$8smps45smps45 '$0$8smps6smps6 `$`$8smps7smps7 w@$w@$8smps8smps8 '$0$8smps9smps9 2Z$2ZJ$8smps10_out2 smps10_out2 LK@$LK@$8smps10_out1 smps10_out1 LK@$LK@`ldo1ldo1 w@$w@ldo2ldo2 2Z$2ZXldo3ldo3 `$`$8ldo4ldo4 w@$w@ldo5ldo5 w@$w@$8ldo6ldo6 O$O$8ldo7ldo7 $ disabledldo8ldo8 -$-$8ldo9ldo9 w@$-8{ldolnldoln w@$w@$8ldousbldousb 1P$1P$8regen3regen3$8target-module@72000ti,sysc-omap2ti,sysci2c2   revsyscsyss mfck  i2c@0 ti,omap4-i2c r9defaultq<target-module@78000ti,sysc disabled target-module@7a000ti,sysc-omap2ti,sysci2c4revsyscsyss mfck i2c@0 ti,omap4-i2c r>defaultr<at24@50 atmel,24c02Ptarget-module@7c000ti,sysc-omap2ti,sysci2c5revsyscsyss mHfck i2c@0 ti,omap4-i2c r<target-module@86000ti,sysc-omap4-timerti,sysctimer10`` revsysc mfck `timer@0ti,omap5430-timer mfck r.target-module@88000ti,sysc-omap4-timerti,sysctimer11 revsysc mfck timer@0ti,omap5430-timer mfck r/target-module@90000ti,sysc disabled  target-module@98000ti,sysc-omap4ti,syscmcspi1   revsysc mfck  spi@0ti,omap4-mcspi rAi@ws#s$s%s&s's(s)s* |tx0rx0tx1rx1tx2rx2tx3rx3target-module@9a000ti,sysc-omap4ti,syscmcspi2   revsysc mfck  spi@0ti,omap4-mcspi rBi ws+s,s-s.|tx0rx0tx1rx1defaulttads7846@0defaultu ti,ads7846v`&wr w $target-module@9c000ti,sysc-omap4ti,syscmmc1   revsysc ^fck  mmc@0ti,omap4-hsmmc rS2?ws=s>|txrxVxdefaultyzc{oy | |target-module@a2000ti,sysc disabled  target-module@a4000ti,sysc disabled @ Ptarget-module@a8000ti,sysc disabled  @target-module@ad000ti,sysc-omap4ti,syscmmc3   revsysc mfck  mmc@0ti,omap4-hsmmc r^?wsMsN|txrxdefault}~cotarget-module@b2000ti,sysc disabled  target-module@b4000ti,sysc-omap4ti,syscmmc2 @ @ revsysc ^fck  @mmc@0ti,omap4-hsmmc rV?ws/s0|txrxdefaultcotarget-module@b8000ti,sysc-omap4ti,syscmcspi3   revsysc mfck  spi@0ti,omap4-mcspi r[iwss|tx0rx0target-module@ba000ti,sysc-omap4ti,syscmcspi4   revsysc mfck  spi@0ti,omap4-mcspi r0iwsFsG|tx0rx0target-module@d1000ti,sysc-omap4ti,syscmmc4   revsysc mfck  mmc@0ti,omap4-hsmmc r`?ws9s:|txrx disabledtarget-module@d5000ti,sysc-omap4ti,syscmmc5 P P revsysc m@fck  Pmmc@0ti,omap4-hsmmc r;?ws;s<|txrx disabledsegment@200000 simple-businterconnect@40100000ti,omap5-l4-abesimple-bus@@laap@IIsegment@0 simple-bus0  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,syscmcbsp1 sysc  (fck I I mcbsp@0ti,omap4-mcbspI mpudma rcommonws!s"|txrx disabledtarget-module@24000ti,sysc-omap2ti,syscmcbsp2@sysc  0fck@I@I@mcbsp@0ti,omap4-mcbspI@mpudma rcommonwss|txrx disabledtarget-module@26000ti,sysc-omap2ti,syscmcbsp3`sysc  8fck`I`I`mcbsp@0ti,omap4-mcbspI`mpudma rcommonwss|txrx disabledtarget-module@28000ti,sysc disabledIItarget-module@2a000ti,sysc disabledIItarget-module@2e000ti,sysc-omap4ti,syscdmic revsysc fckIIdmic@0ti,omap4-dmicImpudma rrwsC|up_link disabledtarget-module@30000ti,sysc disabledIItarget-module@32000ti,sysc-omap4ti,syscmcpdm   revsysc fck I I  disabledmcpdm@0ti,omap4-mcpdmI mpudma rpwsAsB|up_linkdn_linktarget-module@38000ti,sysc-omap4-timerti,sysctimer5 revsysc HfckIItimer@0ti,omap5430-timerI Hfck r)target-module@3a000ti,sysc-omap4-timerti,sysctimer6 revsysc PfckIItimer@0ti,omap5430-timerI Pfck r*target-module@3c000ti,sysc-omap4-timerti,sysctimer7 revsysc XfckIItimer@0ti,omap5430-timerI Xfck r+target-module@3e000ti,sysc-omap4-timerti,sysctimer8 revsysc `fckIItimer@0ti,omap5430-timerI `fck r,target-module@80000ti,sysc disabledIItarget-module@a0000ti,sysc disabled I I target-module@c0000ti,sysc disabled I I target-module@f1000ti,sysc disabledIIocmcram@40300000 mmio-sram@0gpmc@50000000ti,omap4430-gpmcP rws|rxtxgpmcDfck}mmu@4a066000ti,omap4-iommuJ` rmmu_dspmmu@55082000ti,omap4-iommuU  rdmmu_ipudmm@4e000000 ti,omap5-dmmN rqdmmemif@4c000000 ti,emif-4d5emif1$L rn-DYemif@4d000000 ti,emif-4d5emif2$M ro-DYbandgap@4a0021e0 J! J#, J#,J#< r~ti,omap5430-bandgaplsata@4a141100snps,dwc-ahciJJ r6 sata-phy ^hsatatarget-module@56000000ti,sysc-omap4ti,syscVV revsysc   fck Vdss@58000000 ti,omap5-dssXok dss_core fckdefaultdispc@58001000ti,omap5-dispcX r dss_dispc fckencoder@58002000ti,omap5-rfbiX  disabled dss_rfbiDfckickencoder@58004000 ti,omap5-dsiX@XB@XC@protophypll r5 disabled dss_dsi1  fcksys_clkencoder@58005000 ti,omap5-dsiXX@X@protophypll r7ok dss_dsi2  fcksys_clkencoder@58060000ti,omap5-hdmi XXXXwppllphycore reok dss_hdmi  fcksys_clkwsL |audio_txdefaultportendpoint portendpoint@0endpoint@1regulator-abb-mpu ti,abb-v2abb_mpu2 J|J`J!J3base-addressint-addressefuse-addressldo-address02,regulator-abb-mm ti,abb-v2abb_mm2 J|J`J!J3base-addressint-addressefuse-addressldo-address02memory@80000000memoryfixed-regulator-mmcsdregulator-fixed vmmcsd_fixed 2Z$2Zfixed-regulator-vwlan-pdnregulator-fixedvwlan_pdn_fixed 2Z$2Z>  XIfixed-regulator-vwlanregulator-fixed vwlan_fixed 2Z$2Z> XIads7846-regregulator-fixed ads7846-reg 2Z$2Zvhsusb2_phyusb-nop-xceiv \ Ighsusb3_phyusb-nop-xceiv \Ihleds gpio-ledsled1 hHeartbeat  nheartbeatoffdisplay!startek,startek-kd050cpanel-dpihlcddefault |panel-timing<@ ((+    portendpointconnector0hdmi-connectorhhdmiadefault )portendpointencoder0 ti,tfp410portsport@0endpointport@1endpointconnector1dvi-connectorhdvi 3 ;portendpoint #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5display0display1display2device_typeregoperating-pointsclocksclock-namesclock-latency#cooling-cellscpu0-supplyphandlepolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellsti,hwmodssramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneclock-multclock-divti,bit-shiftti,max-div#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,timer-alwonstatuspinctrl-namespinctrl-0sysconregulator-nameregulator-min-microvoltregulator-max-microvoltclock-frequencyti,index-power-of-twoti,dividersassigned-clocksassigned-clock-ratesti,sysc-midleutmi-modeextconvbus-supplyinterrupt-namesphysphy-namesdr_mode#dma-cellsdma-channelsdma-requestsport2-modeport3-moderemote-wakeup-connectedsyscon-phy-power#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellsti,timer-pwmpagesizeti,system-power-controllerti,enable-vbus-detectionti,enable-id-detectionti,wakeupti,ldo6-vibratorregulator-always-onregulator-boot-onti,smps-rangestartup-delay-usti,spi-num-csdmasdma-namesvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-invertedwp-invertedcd-gpioswp-gpiosti,non-removableti,buffer-sizeti,timer-dspgpmc,num-csgpmc,num-waitpins#iommu-cellsti,iommu-bus-err-backti,no-idle-on-initphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alert#thermal-sensor-cellsports-implementedvdd-supplyvdda-supplyremote-endpointlanesdata-linesti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infovin-supplyenable-active-highreset-gpioslabellinux,default-triggerdefault-stateenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpiosdigitalddc-i2c-bus