\8Vd(V,,mecer,xms6rockchip,rk32297Mecer Xtreme Mini S6aliases=/serial@11010000E/serial@11020000M/serial@11030000U/spi@11090000cpuscpu@f00Zcpu,arm,cortex-a7fjq@pscicpu@f01Zcpu,arm,cortex-a7fjqpscicpu@f02Zcpu,arm,cortex-a7fjqpscicpu@f03Zcpu,arm,cortex-a7fjqpsciopp_table0,operating-points-v2opp-408000000Q~@opp-600000000#Fopp-8160000000,B@opp-1008000000<opp-1200000000Gtxopp-1296000000M?d7opp-1392000000R<opp-1464000000WB\amba ,simple-buspdma@110f0000,arm,pl330arm,primecellf@ $apb_pclk arm-pmu,arm,cortex-a7-pmu0LMNO0psci,arm,psci-1.0arm,psci-0.2smctimer,arm,armv7-timerC0   gn6oscillator ,fixed-clockgn6wxin24m"display-subsystem,rockchip,display-subsystem i2s1@100b0000(,rockchip,rk3228-i2srockchip,rk3066-i2sf @ $i2s_clki2s_hclkQ  txrxdefault  disabledi2s0@100c0000(,rockchip,rk3228-i2srockchip,rk3066-i2sf @ $i2s_clki2s_hclkP txrx disabledspdif@100d0000,rockchip,rk3228-spdiff  S $mclkhclk txdefault  disabledi2s2@100e0000(,rockchip,rk3228-i2srockchip,rk3066-i2sf@ $i2s_clki2s_hclkR txrx disabledsyscon@11000000&,rockchip,rk3228-grfsysconsimple-mfdf#io-domains",rockchip,rk3228-io-voltage-domainokay  usb2-phy@760,rockchip,rk3228-usb2phyf` $phyclk wusb480m_phy0okay;otg-port$;<=otg-bvalidotg-idlinestateokay:host-port > linestateokay<usb2-phy@800,rockchip,rk3228-usb2phyf $phyclk wusb480m_phy1okay=otg-port D linestateokay>host-port E linestateokay?serial@11010000,snps,dw-apb-uartf 7gn6MU$baudclkapb_pclkdefault % disabledserial@11020000,snps,dw-apb-uartf 8gn6NV$baudclkapb_pclkdefault% disabledserial@11030000,snps,dw-apb-uartf 9gn6OW$baudclkapb_pclkdefault%okayefuse@11040000,rockchip,rk3228-efusef G $pclk_efuseid@7fcpu_leakage@17fi2c@11050000,rockchip,rk3228-i2cf $$i2cLdefault disabledi2c@11060000,rockchip,rk3228-i2cf %$i2cMdefault disabledi2c@11070000,rockchip,rk3228-i2cf &$i2cNdefault disabledi2c@11080000,rockchip,rk3228-i2cf '$i2cOdefault disabledspi@11090000,rockchip,rk3228-spif  1AR$spiclkapb_pclkdefault disabledwatchdog@110a0000 ,snps,dw-wdtf  (b disabledpwm@110b0000,rockchip,rk3288-pwmf 2^$pwmdefault disabledpwm@110b0010,rockchip,rk3288-pwmf 2^$pwmdefaultokayJpwm@110b0020,rockchip,rk3288-pwmf 2^$pwmdefault okayKpwm@110b0030,rockchip,rk3288-pwmf 02^$pwmdefault! disabledtimer@110c0000,,rockchip,rk3228-timerrockchip,rk3288-timerf  + "a $timerpclkclock-controller@110e0000,rockchip,rk3228-cruf=#JHWkb$g#g0,eррxhррxhthermal-zonescpu-thermal|d$tripscpu_alert0papassive%cpu_alert1$apassive&cpu_crit_ acriticalcooling-mapsmap0%0map1&0tsadc@11150000,rockchip,rk3228-tsadcf :HX$tsadcapb_pclkWHgjW tsadc-apbinitdefaultsleep'('sokay($hdmi-phy@12030000,rockchip,rk3228-hdmi-phyfm"$sysclkrefoclkrefpclk whdmiphy_phyokay,gpu@20000000",rockchip,rk3228-maliarm,mali-400f Hgpgpmmupp0ppmmu0pp1ppmmu1 $corebusj~okay?)iommu@20020800,rockchip,iommuf   vpu_mmu $aclkifaceK disablediommu@20030480,rockchip,iommuf @ @  vdec_mmu $aclkifaceK disabledvop@20050000,rockchip,rk3228-vopf   $aclk_vopdclk_vophclk_vopjdef axiahbdclkW*okayport endpoint@0f^+0iommu@20053f00,rockchip,iommuf ?  vop_mmu $aclkifacenokay*iommu@20070800,rockchip,iommuf  iep_mmu $aclkifaceKokayhdmi@200a0000,rockchip,rk3228-dw-hdmif % #W{,{l$isfriahbcecdefault -./j`hdmi,hdmi=#okayportsportendpoint@0f^0+dwmmc@300000000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshcf0@   Drv$biuciuciu-driveciu-sampledefault 123okaydwmmc@300100000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshcf0@   Esw$biuciuciu-driveciu-sampledefault 456 disableddwmmc@300200000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshcf0@ g<4`<4` Guy$biuciuciu-driveciu-sampledefault 789jSresetokayusb@300400002,rockchip,rk3228-usbrockchip,rk3066-usbsnps,dwc2f0 $otgotg -@ <: usb2-phyokayusb@30080000 ,generic-ehcif0  ; $usbhostutmi<usbokayusb@300a0000 ,generic-ohcif0   ; $usbhostutmi<usbokayusb@300c0000 ,generic-ehcif0   = $usbhostutmi>usbokayusb@300e0000 ,generic-ohcif0  = $usbhostutmi>usbokayusb@30100000 ,generic-ehcif0 B =?usb $usbhostutmiokayusb@30120000 ,generic-ohcif0 C = $usbhostutmi?usbokayethernet@30200000,rockchip,rk3228-gmacf0  macirq8~oM$stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macj8 stmmaceth=#okayW|gFoutputS@^rmiiAmdio,snps,dwmac-mdiophy@04,ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22fgj?@interrupt-controller@32010000 ,arm,gic-400y f22 2@ 2`   pinctrl,rockchip,rk3228-pinctrl=#gpio0@11110000,rockchip,gpio-bankf 3@ygpio1@11120000,rockchip,gpio-bankf 4Aygpio2@11130000,rockchip,gpio-bankf 5Bygpio3@11140000,rockchip,gpio-bankf 6CyFpcfg-pull-upEpcfg-pull-downDpcfg-pull-noneCpcfg-pull-none-drv-12ma Bsdmmcsdmmc-clkB1sdmmc-cmdB2sdmmc-bus4@BBBB3sdiosdio-clkB4sdio-cmdB5sdio-bus4@BBBB6emmcemmc-clkC7emmc-cmdC8emmc-bus8CCCCCCCC9gmacrgmii-pinsC CCBBBB B BCCCC CCrmii-pinsC CCBB BCCCCphy-pins CChdmihdmi-hpdD.hdmii2c-xfer CC-hdmi-cecC/i2c0i2c0-xfer CCi2c1i2c1-xfer CCi2c2i2c2-xfer CCi2c3i2c3-xfer CCspi-0spi0-clk Espi0-cs0Espi0-tx Espi0-rx Espi0-cs1 Espi-1spi1-clkEspi1-cs0Espi1-rxEspi1-txEspi1-cs1Ei2s1i2s1-busC C C C CCCCC pwm0pwm0-pinCpwm1pwm1-pinCpwm2pwm2-pin C pwm3pwm3-pin C!spdifspdif-txC tsadcotp-gpioC'otp-outC(uart0uart0-xfer CCuart0-ctsCuart0-rtsCuart1uart1-xfer  C Cuart1-ctsCuart1-rts Cuart2uart2-xfer ECuart21-xfer  E Cuart2-ctsCuart2-rtsCusbhost-vbus-drvCGmemory@60000000Zmemoryf`@dc-12v-regulator,regulator-fixeddc_12v$6NIext_gmac ,fixed-clockgsY@ wext_gmacpower-led ,gpio-ledsblue fFlonvcc-host-regulator,regulator-fixedz FdefaultG vcc_host$Hvcc-phy-regulator,regulator-fixedzvcc_phy6w@Nw@$Avcc-sys-regulator,regulator-fixedvcc_sys$6LK@NLK@IHvccio-1v8-regulator,regulator-fixed vccio_1v86w@Nw@Hvccio-3v3-regulator,regulator-fixed vccio_3v362ZN2ZH vdd-arm-regulator,pwm-regulatorJaHvdd_arm6~N\$vdd-log-regulator,pwm-regulatorKaHvdd_log6B@N $) #address-cells#size-cellsinterrupt-parentcompatiblemodelserial0serial1serial2spi0device_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksenable-methodcpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrangesinterrupts#dma-cellsclock-namesinterrupt-affinityarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsportsdmasdma-namespinctrl-namespinctrl-0statusvccio1-supplyvccio2-supplyvccio4-supplyinterrupt-names#phy-cellsphy-supplyreg-shiftreg-io-width#pwm-cellsrockchip,grf#reset-cellsassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-modemali-supplyiommu-cellsiommusremote-endpoint#iommu-cellsassigned-clock-parentsphysphy-namesfifo-depthcap-mmc-highspeeddisable-wpmax-frequencybus-widthdefault-sample-phasenon-removabledr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaclock_in_outphy-handlephy-modephy-is-integratedinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltgpiosdefault-stateenable-active-highgpiovin-supplypwmspwm-supply