8 ( Kgoogle,veyron-brain-rev0google,veyron-braingoogle,veyronrockchip,rk3288& 7Google Brainaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbcpu-opp-tableoperating-points-v2jbopp-126000000u| opp-216000000u | opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ|opp-1608000000u_"| opp-1704000000ue|popp-1800000000ukI|\amba simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkbdma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkbUreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem5 dwmmc@ff0c0000rockchip,rk3288-dw-mshc;р 5Drvbiuciuciu-driveciu-sampleI  @Treset disableddwmmc@ff0d0000rockchip,rk3288-dw-mshc;р 5Eswbiuciuciu-driveciu-sampleI ! @Tresetokay`j{ default dwmmc@ff0e0000rockchip,rk3288-dw-mshc;р 5Ftxbiuciuciu-driveciu-sampleI "@Treset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc;р 5Guybiuciuciu-driveciu-sampleI #@Tresetokay`/MXdefault saradc@ff100000rockchip,saradc $g5I[saradcapb_pclkW Tsaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclky  ~txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclky ~txrx -default disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclky~txrx .default !"#okay flash@0jedec,spi-nori2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault$okay2dtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault% disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault&okay2,i2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault' disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkdefault ()*okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkdefault+okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkdefault,okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkdefault- disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkdefault. disabledthermal-zonesreserve_thermal !//cpu_thermal d!//tripscpu_alert0?pKpassiveb0cpu_alert1?$Kpassiveb1cpu_crit?K criticalcooling-mapsmap0V00[map1V10[gpu_thermal d!//tripsgpu_alert0?4Kpassiveb2gpu_crit?K criticalcooling-mapsmap0V2 [3tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk Ttsadc-apbinitdefaultsleep4j5t4~6Hokayb/ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq685fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Tstmmaceth disabledusb@ff500000 generic-ehciP 5usbhost7usbokay usb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost8 usb2-phy'okay>usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otghostUgv@@ 9 usb2-phyokayz9>usb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Ldefault:okay2dpmic@1brockchip,rk808xin32kwifibt_32kin&;default <=> #0?=@ @bregulatorsDCDC_REG1Gvdd_armVj| q qb regulator-state-memDCDC_REG2Gvdd_gpuVj| 5qbqregulator-state-memDCDC_REG3 Gvcc135_ddrVjregulator-state-memDCDC_REG4Gvcc_18Vj|w@w@bregulator-state-memw@LDO_REG3Gvdd_10Vj|B@B@regulator-state-memB@LDO_REG7 Gvdd10_lcdVj|B@B@regulator-state-memSWITCH_REG1 Gvcc33_lcdVjbTregulator-state-memSWITCH_REG2Vj Gvcc18_hdmii2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultAokay2 pwm@ff680000rockchip,rk3288-pwmh-defaultB5_pwm disabledpwm@ff680010rockchip,rk3288-pwmh-defaultC5_pwmokaybpwm@ff680020rockchip,rk3288-pwmh -defaultD5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0-defaultE5_pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controller8h bXpd_vio@9 5chgfdehilkj$LFGHIJKLMNpd_hevc@11 5opLOPpd_video@12 5LQpd_gpu@13 5LRSreboot-modesyscon-reboot-modeSZRBfRBtRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv6Hjk$#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb6edp-phyrockchip,rk3288-dp-phy5h24m disabledbhio-domains"rockchip,rk3288-io-voltage-domainokay???T usbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclk Tphy-resetb9usb-phy@33445^phyclk Tphy-resetb7usb-phy@348H5_phyclk Tphy-resetb8watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk5TyU~tx 6defaultV6 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5yUU~txrxi2s_hclki2s_clk5RdefaultW'B disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk Tcrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface\ disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface\i disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkX ilm Tcoreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopX def TaxiahbdclkYokayportb endpoint@0Zbmendpoint@1[biendpoint@2\bcendpoint@3]bfiommu@ff930300rockchip,iommu  vopb_mmu5 aclkifaceX \okaybYvop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopX  Taxiahbdclk^ disabledportb endpoint@0_bnendpoint@1`bjendpoint@2abdendpoint@3bbgiommu@ff940300rockchip,iommu  vopl_mmu5 aclkifaceX \ disabledb^mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkX 6 disabledportsportendpoint@0cb\endpoint@1dbalvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdceX 6 disabledportsport@0endpoint@0fb]endpoint@1gbbdp@ff970000rockchip,rk3288-dp@ b5icdppclkhdpoTdp6 disabledportsport@0endpoint@0ib[endpoint@1jb`hdmi@ff980000rockchip,rk3288-dw-hdmi6 g5hmniahbisfrcecX okaydefaultunwedgekjlportsportendpoint@0mbZendpoint@1nb_video-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclkoX iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface\X boiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface\ disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5pX okayqb3gpu-opp-tableoperating-points-v2bpopp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000syscon bRqos@ffaa0080syscon bSqos@ffad0000syscon bGqos@ffad0100syscon bHqos@ffad0180syscon bIqos@ffad0400syscon bJqos@ffad0480syscon bKqos@ffad0500syscon bFqos@ffad0800syscon bLqos@ffad0880syscon bMqos@ffad0900syscon bNqos@ffae0000syscon bQqos@ffaf0000syscon bOqos@ffaf0080syscon bPefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17interrupt-controller@ffc01000 arm,gic-400@ @ `   bpinctrlrockchip,rk3288-pinctrl6defaultsleeprstujrstvgpio0@ff750000rockchip,gpio-banku Q5@b;gpio1@ff780000rockchip,gpio-bankx R5Agpio2@ff790000rockchip,gpio-banky S5Bbgpio3@ff7a0000rockchip,gpio-bankz T5Cgpio4@ff7b0000rockchip,gpio-bank{ U5Dbgpio5@ff7c0000rockchip,gpio-bank| V5Egpio6@ff7d0000rockchip,gpio-bank} W5Fgpio7@ff7e0000rockchip,gpio-bank~ X5Gb@gpio8@ff7f0000rockchip,gpio-bank Y5Hhdmihdmi-cec-c0whdmi-cec-c7whdmi-ddc wwbkhdmi-ddc-unwedge xwblvcc50-hdmi-enwbpcfg-output-low bxpcfg-pull-up bypcfg-pull-down bzpcfg-pull-none ,bwpcfg-pull-none-12ma , 9 b}sleepglobal-pwroffwbtddrio-pwroffwbsddr0-retentionybrddr1-retentionyedpedp-hpd zi2c0i2c0-xfer wwb:i2c1i2c1-xfer wwb$i2c2i2c2-xfer  w wbAi2c3i2c3-xfer wwb%i2c4i2c4-xfer wwb&i2c5i2c5-xfer wwb'i2s0i2s0-bus`wwwwwwbWlcdclcdc-ctl@wwwwbesdmmcsdmmc-clkwsdmmc-cmdysdmmc-cdysdmmc-bus1ysdmmc-bus4@yyyysdio0sdio0-bus1ysdio0-bus4@{{{{bsdio0-cmd{bsdio0-clk{bsdio0-cdysdio0-wpysdio0-pwrysdio0-bkpwrysdio0-intywifienable-hwbbt-enable-lwbbt-host-wakezb~bt-host-wake-lwbt-dev-wake-sleepxbvbt-dev-wake-awake|busdio1sdio1-bus1ysdio1-bus4@yyyysdio1-cdysdio1-wpysdio1-bkpwrysdio1-intysdio1-cmdysdio1-clkwsdio1-pwr yemmcemmc-clk{bemmc-cmd{bemmc-pwr yemmc-bus1yemmc-bus4@yyyyemmc-bus8{{{{{{{{bemmc-reset wbspi0spi0-clk ybspi0-cs0 ybspi0-txybspi0-rxybspi0-cs1yspi1spi1-clk ybspi1-cs0 ybspi1-rxybspi1-txybspi2spi2-cs1yspi2-clkyb spi2-cs0yb#spi2-rxyb"spi2-tx yb!uart0uart0-xfer ywb(uart0-ctsyb)uart0-rtswb*uart1uart1-xfer y wb+uart1-cts yuart1-rts wuart2uart2-xfer ywb,uart3uart3-xfer ywb-uart3-cts yuart3-rts wuart4uart4-xfer ywb.uart4-cts yuart4-rts wtsadcotp-gpio wb4otp-out wb5pwm0pwm0-pinwbBpwm1pwm1-pinwbCpwm2pwm2-pinwbDpwm3pwm3-pinwbEgmacrgmii-pinswwww}}}}www }}wwrmii-pinswwwwwwwwwwspdifspdif-tx wbVpcfg-pull-none-drv-8ma , 9b{pcfg-pull-up-drv-8ma  9pcfg-output-high Hb|buttonspwr-key-lybpmicpmic-int-lyb<dvs-1 zb=dvs-2zb>rebootap-warm-reset-h wbrecovery-switchrec-mode-l ytpmtpm-int-hwwrite-protectfw-wp-apwusb-hostusb2-pwr-en wbchosen Tserial2:115200n8memorymemorybt-activity gpio-keysdefault~bt-wake `BT Wakeup A fpower-button gpio-keysdefaultpower `Power A; ft qdgpio-restart gpio-restart A; default emmc-pwrseqmmc-pwrseq-emmcdefault bsdio-pwrseqmmc-pwrseq-simple5 ext_clockdefault b vcc-5vregulator-fixedGvcc_5vVj|LK@LK@bvcc33-sysregulator-fixed Gvcc33_sysVj|2Z2Z bvcc50-hdmiregulator-fixed Gvcc50_hdmiVj   @defaultvdd-logicpwm-regulator Gvdd_logic   { Vj|~pvcc33_ioregulator-fixed Gvcc33_ioVj b?vcc5-host2-regulatorregulator-fixed  ; default Gvcc5_host2Vj #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unit