M8( xgoogle,veyron-speedy-rev9google,veyron-speedy-rev8google,veyron-speedy-rev7google,veyron-speedy-rev6google,veyron-speedy-rev5google,veyron-speedy-rev4google,veyron-speedy-rev3google,veyron-speedy-rev2google,veyron-speedygoogle,veyronrockchip,rk3288&7Google Speedyaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12 -@;Br\ hcpu@501cpuarm,cortex-a12 -@;Brhcpu@502cpuarm,cortex-a12 -@;Brhcpu@503cpuarm,cortex-a12 -@;Brhcpu-opp-tableoperating-points-v2phopp-126000000{ opp-216000000{  opp-408000000{Q opp-600000000{#F opp-696000000{)|~opp-816000000{0,B@opp-1008000000{<opp-1200000000{Gopp-1416000000{TfrOopp-1512000000{ZJopp-1608000000{_" opp-1704000000{epopp-1800000000{kI\amba simple-busdma-controller@ff250000arm,pl330arm,primecell%@; apb_pclkhdma-controller@ff600000arm,pl330arm,primecell`@; apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@; apb_pclkhareserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mh timerarm,armv7-timer0   n6$timer@ff810000rockchip,rk3288-timer  H ; a timerpclkdisplay-subsystemrockchip,display-subsystem; dwmmc@ff0c0000rockchip,rk3288-dw-mshcAр ;Drvbiuciuciu-driveciu-sampleO  @Zresetokayfp  Z %default3dwmmc@ff0d0000rockchip,rk3288-dw-mshcAр ;Eswbiuciuciu-driveciu-sampleO ! @Zresetokayf=J`k%default 3 dwmmc@ff0e0000rockchip,rk3288-dw-mshcAр ;Ftxbiuciuciu-driveciu-sampleO "@Zreset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcAр ;Guybiuciuciu-driveciu-sampleO #@Zresetokayfpy`k%default 3saradc@ff100000rockchip,saradc $;I[saradcapb_pclkW Zsaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi;ARspiclkapb_pclk  txrx ,%default3 !"#okayec@0google,cros-ec-spi& %default3$-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb# 6@P};0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi;BSspiclkapb_pclk txrx -%default3%&'( disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi;CTspiclkapb_pclktxrx .%default3)*+,okay] flash@0jedec,spi-nori2c@ff140000rockchip,rk3288-i2c >i2c;M%default3-okayp2dtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c;O%default3. disabledi2c@ff160000rockchip,rk3288-i2c @i2c;P%default3/okayp2,ts3a227e@3b ti,ts3a227e;&0%default31htrackpad@15elan,ekth3000& %default323i2c@ff170000rockchip,rk3288-i2c Ai2c;Q%default34 disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7;MUbaudclkapb_pclk%default 3567okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8;NVbaudclkapb_pclk%default38okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9;OWbaudclkapb_pclk%default39okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :;PXbaudclkapb_pclk%default3: disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;;QYbaudclkapb_pclk%default3; disabledthermal-zonesreserve_thermal<cpu_thermald<tripscpu_alert0&2passiveh=cpu_alert1&p2passiveh>cpu_crit&_2 criticalcooling-mapsmap0==0Bmap1=>0Bgpu_thermald<tripsgpu_alert0&82passiveh?gpu_crit&_2 criticalcooling-mapsmap0=? B@tsadc@ff280000rockchip,rk3288-tsadc( %;HZtsadcapb_pclk Ztsadc-apb%initdefaultsleep3AQB[Ae{CHokayh<ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq{C8;fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Zstmmaceth disabledusb@ff500000 generic-ehciP ;usbhostDusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T ;otghostE usb2-phyokay%usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X ;otghost<N]@@ F usb2-phyokaylz|F%usb@ff5c0000 generic-ehci\ ;usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c;L%default3Gokayp2dpmic@1brockchip,rk808xin32kwifibt_32kin&0%default3HI3"/I;IhregulatorsDCDC_REG1Hvdd_armWk} q qh regulator-state-memDCDC_REG2Hvdd_gpuWk} 5qh~regulator-state-memDCDC_REG3 Hvcc135_ddrWkregulator-state-memDCDC_REG4Hvcc_18Wk}w@w@hregulator-state-memw@LDO_REG1 Hvcc33_ioWk}2Z2Zh3regulator-state-mem2ZLDO_REG3Hvdd_10Wk}B@B@regulator-state-memB@LDO_REG7Hvdd10_lcd_pwren_hWk}&%&%regulator-state-memSWITCH_REG1 Hvcc33_lcdWkh_regulator-state-memLDO_REG6 Hvcc18_codecWk}w@w@h`regulator-state-memLDO_REG4 Hvccio_sd}w@2Zhregulator-state-memLDO_REG5 Hvcc33_sd}2Z2Zhregulator-state-memLDO_REG8 Hvcc33_ccdWk}2Z2Zregulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c;N%default3Jokayp2 max98090@10maxim,max98090&Kmclk;q%default3Lhpwm@ff680000rockchip,rk3288-pwmh%default3M;_pwmokayhpwm@ff680010rockchip,rk3288-pwmh%default3N;_pwmokayhpwm@ff680020rockchip,rk3288-pwmh %default3O;_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0%default3P;_pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdshpower-controller!rockchip,rk3288-power-controllerlh| hdpd_vio@9 ;chgfdehilkj$.QRSTUVWXYpd_hevc@11 ;op.Z[pd_video@12 ;.\pd_gpu@13 ;.]^reboot-modesyscon-reboot-mode5?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~  %default3 B@   hpanelinnolux,n116bgesimple-panelokay  panel-timingl V  $< 0 : G O \  h  rportsportendpoint hwgpio-charger gpio-charger mains 0%default3lid-switch gpio-keys%default3lid wLid 0 }  vccsysregulator-fixedHvccsyskWhvcc5-host1-regulatorregulator-fixed  0 %default3 Hvcc5_host1Wkvcc5v-otg-regulatorregulator-fixed  0 %default3 Hvcc5_host2Wk #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecstartup-delay-usbrightness-levelsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenhsync-activevactivevfront-porchvback-porchvsync-lenvsync-activecharger-typelinux,input-type