84()Gateworks Ventana i.MX6 Dual/Quad GW553X%!gw,imx6q-gw553xgw,ventanafsl,imx6qchosen ,/soc/bus@2100000/serial@21e8000aliases"8/soc/bus@2100000/ethernet@2188000!B/soc/bus@2000000/flexcan@2090000!G/soc/bus@2000000/flexcan@2094000L/soc/bus@2000000/gpio@209c000R/soc/bus@2000000/gpio@20a0000X/soc/bus@2000000/gpio@20a4000^/soc/bus@2000000/gpio@20a8000d/soc/bus@2000000/gpio@20ac000j/soc/bus@2000000/gpio@20b0000p/soc/bus@2000000/gpio@20b4000v/soc/bus@2100000/i2c@21a0000{/soc/bus@2100000/i2c@21a4000/soc/bus@2100000/i2c@21a8000/soc/ipu@2400000/soc/bus@2100000/mmc@2190000/soc/bus@2100000/mmc@2194000/soc/bus@2100000/mmc@2198000/soc/bus@2100000/mmc@219c0001/soc/bus@2000000/spba-bus@2000000/serial@2020000 /soc/bus@2100000/serial@21e8000 /soc/bus@2100000/serial@21ec000 /soc/bus@2100000/serial@21f0000 /soc/bus@2100000/serial@21f4000./soc/bus@2000000/spba-bus@2000000/spi@2008000./soc/bus@2000000/spba-bus@2000000/spi@200c000./soc/bus@2000000/spba-bus@2000000/spi@2010000./soc/bus@2000000/spba-bus@2000000/spi@2014000 /soc/bus@2000000/usbphy@20c9000 /soc/bus@2000000/usbphy@20ca000/soc/ipu@2800000./soc/bus@2000000/spba-bus@2000000/spi@2018000 /leds/user1 /leds/user2/soc/gpmi-nand@112000/soc/bus@2100000/usb@2184200/soc/bus@2100000/usb@2184000clocksckil!fsl,imx-ckilfixed-clock ckih1!fsl,imx-ckih1fixed-clock osc!fsl,imx-oscfixed-clock n6ldb!fsl,imx6q-ldbfsl,imx53-ldb* .disabled@5!"'()*8:gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpioH @uLMDT%p`6 Vgpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpioH @@uNODT%0`   \5keypad@20b8000!fsl,imx6q-kppfsl,imx21-kppH @ uR5> .disabledwatchdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdtH @ uP5>defaultlwatchdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdtH @ uQ5> .disabledclock-controller@20c4000!fsl,imx6q-ccmH @@uWX \anatop@20c8000#!fsl,imx6q-anatopsysconsimple-mfdH $u16\ regulator-1p1!fsl,anatop-regulatorvdd1p1B@O# 56Iregulator-3p0!fsl,anatop-regulatorvdd3p0*0 #( 63@Iregulator-2p5!fsl,anatop-regulatorvdd2p5"U)00# 6+xIregulator-vddcore!fsl,anatop-regulatorvddarm  @[ps# 6 \bregulator-vddpu!fsl,anatop-regulatorvddpu  @ [ps# 6 \$regulator-vddsoc!fsl,anatop-regulatorvddsoc  @[ps# 6 \ctempmon!fsl,imx6q-tempmond  u1 !"calibtemp_grade5usbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphyH  u,5 \+usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphyH  u-5 \/snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfdH @\#snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp#4usnvs-poweroff!syscon-poweroff#8`` .disabledsnvs-powerkey!fsl,sec-v4.0-pwrkey# ut" .disabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000H @ u8epit@20d4000H @@ u9reset-controller@20d8000!fsl,imx6q-srcfsl,imx51-srcH @u[`0\gpc@20dc000!fsl,imx6q-gpcH @% uYd5>d>uportendpointL?\'romcp@21ac000H@memory-controller@21b0000!fsl,imx6q-mmdcH@5memory-controller@21b4000!fsl,imx6q-mmdcH@@ .disabledweim@21b8000!fsl,imx6q-weimH@ u5 .disabledefuse@21bc000!fsl,imx6q-ocotpsysconH@5speed-grade@10H\dcalib@38H8\!temp-grade@20H \"tzasc@21d0000H@ ultzasc@21d4000H@@ umaudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmuxH@ .disabledmipi@21dc000!fsl,imx6-mipi-csi2H@ude5a $Hcd speed_gradecpu@1!arm,cortex-a9cpuHa(Otx2   ( Otx2   %l(5h)$Hccpu@2!arm,cortex-a9cpuHa(Otx2   ( Otx2   %l(5h)$Hccpu@3!arm,cortex-a9cpuHa(Otx2   ( Otx2   %l(5h)$Hccapture-subsystem!fsl,imx-capture-subsystemSefghdisplay-subsystem!fsl,imx-display-subsystemSijklgpio-keys !gpio-keysuser-pbluser_pb ^mYuser-pb1x luser_pb1xYd7ukey-erased lkey-erasedYd7ueeprom-wp leeprom_wpYd7utamperltamperYd7uswitch-hold lswitch_holdYd7uleds !gpio-ledsdefaultnuser1luser1 ^o don rheartbeatuser2luser2 ^o doffmemory@10000000memoryH pps !pps-gpiodefaultp ^.okayregulator-5p0v!regulator-fixed5P0VLK@LK@regulator-usb-otg-vbus!regulator-fixed usb_otg_vbusLK@LK@ q\- #address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1ipu1spi4led0led1nandusb0usb1#clock-cellsclock-frequencygprstatusclocksclock-namesregremote-endpointphandleinterrupt-parentinterrupts#phy-cellsrangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namespinctrl-namespinctrl-0ddc-i2c-buspower-domains#cooling-cells#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridedevice_typebus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapreset-gpio#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsfsl,stop-modegpio-controller#gpio-cellsgpio-rangesfsl,ext-reset-outputregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonnvmem-cellsnvmem-cell-names#thermal-sensor-cellsfsl,anatopregmapvaluelinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsbus-widthfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_modephy_type#index-cellspinctrl-1pinctrl-2cd-gpiosgw,modelabelpagesizest,drdy-int-pinlltc,fb-voltage-dividerregulator-ramp-delayregulator-boot-onpowerdown-gpiosfsl,weim-cs-gprnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportslinux,codedefault-statelinux,default-triggerenable-active-high