8h( u0]incostartec,omap3-lilly-dbb056incostartec,omap3-lilly-a83xti,omap3630ti,omap36xxti,omap3 +"7INCOstartec LILLY-DBB056 (DM3730)chosenA=console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0aliasesF/ocp@68000000/i2c@48070000K/ocp@68000000/i2c@48072000P/ocp@68000000/i2c@48060000U/ocp@68000000/serial@4806a000]/ocp@68000000/serial@4806c000e/ocp@68000000/serial@49020000m/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8ucpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+4Qdefault_pinmux_uart1_pins iLNPR}pinmux_uart2_pinsi@B}pinmux_uart3_pinsinp}pinmux_i2c1_pinsi}pinmux_i2c2_pinsi}pinmux_i2c3_pinsi}pinmux_hsusb1_pinsi}pinmux_hsusb_otg_pins`irtvxz|~}pinmux_mmc1_pins0i}pinmux_spi2_pins i}pinmux_twl4030_pinsiA}pinmux_lan9117_pinsi}pinmux_gpio4_pinsi}pinmux_gpio5_pinsi\}pinmux_lcd_pinsi}pinmux_mmc2_pins`i(*,.02468:jl}pinmux_spi1_pins i}scm_conf@270sysconsimple-busp0+ p0}pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-}clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh} mcbsp5_fckti,composite-clock }mcbsp1_mux_fck@4ti,composite-mux-clock} mcbsp1_fckti,composite-clock }mcbsp2_mux_fck@4ti,composite-mux-clock }mcbsp2_fckti,composite-clock}mcbsp3_mux_fck@68ti,composite-mux-clock h}mcbsp3_fckti,composite-clock}mcbsp4_mux_fck@68ti,composite-mux-clock h}mcbsp4_fckti,composite-clock}clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+4Qdefaultpinmux_lan9221_pinsiZ}pinmux_tsc2048_pinsi}pinmux_mmc1cd_pinsiV}pinmux_twl4030_vpins i}target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss  ick+ H ` aes1@0 ti,omap3-aesP  txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss  ick+ H P aes2@0 ti,omap3-aesPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock&Y}osc_sys_ck@d40 ti,mux-clock @}sys_ck@1270ti,divider-clock6pA}"sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockXcdpll3_m2x2_ckfixed-factor-clockXc}!dpll4_x2_ckfixed-factor-clock Xccorex2_fckfixed-factor-clock!Xc}#wkup_l4_ickfixed-factor-clock"Xc}Rcorex2_d3_fckfixed-factor-clock#Xc}corex2_d5_fckfixed-factor-clock#Xc}clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock&omap_32k_fck fixed-clock&}Dvirt_12m_ck fixed-clock&}virt_13m_ck fixed-clock&]@}virt_19200000_ck fixed-clock&$}virt_26000000_ck fixed-clock&}virt_38_4m_ck fixed-clock&I}dpll4_ck@d00ti,omap3-dpll-per-j-type-clock"" D 0} dpll4_m2_ck@d48ti,divider-clock 6? HA}$dpll4_m2x2_mul_ckfixed-factor-clock$Xc}%dpll4_m2x2_ck@d00ti,hsdiv-gate-clock% m}&omap_96m_alwon_fckfixed-factor-clock&Xc}-dpll3_ck@d00ti,omap3-dpll-core-clock"" @ 0}dpll3_m3_ck@1140ti,divider-clock6@A}'dpll3_m3x2_mul_ckfixed-factor-clock'Xc}(dpll3_m3x2_ck@d00ti,hsdiv-gate-clock(  m})emu_core_alwon_ckfixed-factor-clock)Xc}fsys_altclk fixed-clock&}2mcbsp_clks fixed-clock&}dpll3_m2_ck@d40ti,divider-clock6 @A}core_ckfixed-factor-clockXc}*dpll1_fck@940ti,divider-clock*6 @A}+dpll1_ck@904ti,omap3-dpll-clock"+  $ @ 4}dpll1_x2_ckfixed-factor-clockXc},dpll1_x2m2_ck@944ti,divider-clock,6 DA}@cm_96m_fckfixed-factor-clock-Xc}.omap_96m_fck@d40 ti,mux-clock." @}Idpll4_m3_ck@e40ti,divider-clock 6 @A}/dpll4_m3x2_mul_ckfixed-factor-clock/Xc}0dpll4_m3x2_ck@d00ti,hsdiv-gate-clock0 m}1omap_54m_fck@d40 ti,mux-clock12 @}<cm_96m_d2_fckfixed-factor-clock.Xc}3omap_48m_fck@d40 ti,mux-clock32 @}4omap_12m_fckfixed-factor-clock4Xc}Kdpll4_m4_ck@e40ti,divider-clock 6@A}5dpll4_m4x2_mul_ckti,fixed-factor-clock5}6dpll4_m4x2_ck@d00ti,gate-clock6 m}dpll4_m5_ck@f40ti,divider-clock 6?@A}7dpll4_m5x2_mul_ckti,fixed-factor-clock7}8dpll4_m5x2_ck@d00ti,hsdiv-gate-clock8 m}ndpll4_m6_ck@1140ti,divider-clock 6?@A}9dpll4_m6x2_mul_ckfixed-factor-clock9Xc}:dpll4_m6x2_ck@d00ti,hsdiv-gate-clock: m};emu_per_alwon_ckfixed-factor-clock;Xc}gclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock* p}=clkout2_src_mux_ck@d70ti,composite-mux-clock*".< p}>clkout2_src_ckti,composite-clock=>}?sys_clkout2@d70ti,divider-clock?6@ pmpu_ckfixed-factor-clock@Xc}Aarm_fck@924ti,divider-clockA $6emu_mpu_alwon_ckfixed-factor-clockAXc}hl3_ick@a40ti,divider-clock*6 @A}Bl4_ick@a40ti,divider-clockB6 @A}Crm_ick@c40ti,divider-clockC6 @Agpt10_gate_fck@a00ti,composite-gate-clock"  }Egpt10_mux_fck@a40ti,composite-mux-clockD" @}Fgpt10_fckti,composite-clockEFgpt11_gate_fck@a00ti,composite-gate-clock"  }Ggpt11_mux_fck@a40ti,composite-mux-clockD" @}Hgpt11_fckti,composite-clockGHcore_96m_fckfixed-factor-clockIXc}mmchs2_fck@a00ti,wait-gate-clock }mmchs1_fck@a00ti,wait-gate-clock }i2c3_fck@a00ti,wait-gate-clock }i2c2_fck@a00ti,wait-gate-clock }i2c1_fck@a00ti,wait-gate-clock }mcbsp5_gate_fck@a00ti,composite-gate-clock  } mcbsp1_gate_fck@a00ti,composite-gate-clock  } core_48m_fckfixed-factor-clock4Xc}Jmcspi4_fck@a00ti,wait-gate-clockJ }mcspi3_fck@a00ti,wait-gate-clockJ }mcspi2_fck@a00ti,wait-gate-clockJ }mcspi1_fck@a00ti,wait-gate-clockJ }uart2_fck@a00ti,wait-gate-clockJ }uart1_fck@a00ti,wait-gate-clockJ  }core_12m_fckfixed-factor-clockKXc}Lhdq_fck@a00ti,wait-gate-clockL }core_l3_ickfixed-factor-clockBXc}Msdrc_ick@a10ti,wait-gate-clockM }gpmc_fckfixed-factor-clockMXccore_l4_ickfixed-factor-clockCXc}Nmmchs2_ick@a10ti,omap3-interface-clockN }mmchs1_ick@a10ti,omap3-interface-clockN }hdq_ick@a10ti,omap3-interface-clockN }mcspi4_ick@a10ti,omap3-interface-clockN }mcspi3_ick@a10ti,omap3-interface-clockN }mcspi2_ick@a10ti,omap3-interface-clockN }mcspi1_ick@a10ti,omap3-interface-clockN }i2c3_ick@a10ti,omap3-interface-clockN }i2c2_ick@a10ti,omap3-interface-clockN }i2c1_ick@a10ti,omap3-interface-clockN }uart2_ick@a10ti,omap3-interface-clockN }uart1_ick@a10ti,omap3-interface-clockN  }gpt11_ick@a10ti,omap3-interface-clockN  }gpt10_ick@a10ti,omap3-interface-clockN  }mcbsp5_ick@a10ti,omap3-interface-clockN  }mcbsp1_ick@a10ti,omap3-interface-clockN  }omapctrl_ick@a10ti,omap3-interface-clockN }dss_tv_fck@e00ti,gate-clock<}dss_96m_fck@e00ti,gate-clockI}dss2_alwon_fck@e00ti,gate-clock"}dummy_ck fixed-clock&gpt1_gate_fck@c00ti,composite-gate-clock" }Ogpt1_mux_fck@c40ti,composite-mux-clockD" @}Pgpt1_fckti,composite-clockOP} aes2_ick@a10ti,omap3-interface-clockN }wkup_32k_fckfixed-factor-clockDXc}Qgpio1_dbck@c00ti,gate-clockQ }sha12_ick@a10ti,omap3-interface-clockN }wdt2_fck@c00ti,wait-gate-clockQ }wdt2_ick@c10ti,omap3-interface-clockR }wdt1_ick@c10ti,omap3-interface-clockR }gpio1_ick@c10ti,omap3-interface-clockR }omap_32ksync_ick@c10ti,omap3-interface-clockR }gpt12_ick@c10ti,omap3-interface-clockR }gpt1_ick@c10ti,omap3-interface-clockR }per_96m_fckfixed-factor-clock-Xc} per_48m_fckfixed-factor-clock4Xc}Suart3_fck@1000ti,wait-gate-clockS }gpt2_gate_fck@1000ti,composite-gate-clock"}Tgpt2_mux_fck@1040ti,composite-mux-clockD"@}Ugpt2_fckti,composite-clockTU} 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ti,omap3-i2cH=txrx+i2c3&'@Qdefault_gpio@20microchip,mcp23017FV mailbox@48094000ti,omap3-mailboxmailboxH @3?Qdsp c nspi@48098000ti,omap2-mcspiH A+mcspi1y@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3okayQdefault_spi@4809a000ti,omap2-mcspiH B+mcspi2y +,-.tx0rx0tx1rx1okayQdefault_tsc2046@0 ti,tsc2046 B@ Qdefault_, XPspi@480b8000ti,omap2-mcspiH [+mcspi3y tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4yFGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1=>txrx" /8DPQdefault_Zgxmmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxokayPD / Qdefault_mmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp}mmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyss ick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I 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fckick+ H0@timer@0ti,omap3430-timer_Ousbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+Qdefault_ _ iehci-phyohci@48064400ti,ohci-omap3HDLtehci@48064800 ti,ehci-omapHHM gpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+FV00 }nand@0,0ti,omap2-nand  bch8*8dJd\kd~dKKdd<-G2aKy+partition@0MLOpartition@80000u-bootpartition@260000u-boot-environment&partition@280000kernel(Ppartition@780000 filesystemxethernet@7,0smsc,lan9221smsc,lan9115* 8<J<\k ~  < <dd2GKayK-  Qdefault_miiethernet@4,0smsc,lan9117smsc,lan9115* 8AJA\k ~  A Add<GKayK-  Qdefault_miiusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs    Qdefault_  - 5usb2-phy ?2dss@48050000 ti,omap3-dssH disabled dss_corefck+dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfcktv_dac_clkssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ u ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI PQRtxrxuart4&l disabledregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-address E" ^ o` sO7}pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+4Qdefaultpinmux_hsusb1_2_pins`i8:<>@BDFHJLN} pinmux_gpio1_pinsiZ }isp@480bc000 ti,omap3-ispH H   ports+bandgap@48002524H%$ti,omap36xx-bandgap }target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8sysc fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8sysc fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap4ti,syscPP revsysc  fckick+ Popp-tableoperating-points-v2-ti-cpu}opp50-300000000  ssssss  opp100-600000000 #F OOOOOO opp130-800000000 / 777777 opp1g-1000000000 ;   opp_supplyti,omap-opp-supply thermal-zonescpu_thermal  " 0N  =memory@80000000umemoryleds gpio-ledsled1lilly-a83x::led1 2 Mdefault-onsoundti,omap-twl4030 clilly-a83x lvcc3regulator-fixedVCC32Z2Z}hsusb1_phyusb-nop-xceiv}  compatibleinterrupt-parent#address-cells#size-cellsmodelbootargsi2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csstatusspi-max-frequencypendown-gpiovcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,swap-xywakeup-sourceti,dual-voltpbias-supplycd-gpioscd-invertedvmmc-supplybus-widthcap-sdio-irqcap-sd-highspeedcap-mmc-highspeedwp-gpios#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-securenum-portsport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthti,nand-ecc-optgpmc,mux-add-datagpmc,device-widthgpmc,wait-pingpmc,wait-monitoring-nsgpmc,burst-lengthgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-delay-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nslabelbank-widthgpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthphy-modesmsc,force-internal-phymultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorslinux,default-triggerti,modelti,mcbsp