8( 0ti,omap3-zoom3ti,omap3630ti,omap36xxti,omap3 + 7TI Zoom3chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8lcpux|cpupmu@54000000arm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busxh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busx + pinmux@30 ti,omap3-padconfpinctrl-singlex08+7pinmux_mmc1_pins0Thpinmux_mmc2_pinsPT(*,.02468:pinmux_mmc3_pinsThhpinmux_uart1_pins TPNRALhpinmux_uart2_pins TDFJHhpinmux_uart3_pins Tjlnphpinmux_wl12xx_gpioTh scm_conf@270sysconsimple-busxp0+ p0hpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapxppbias_mmc_omap2430wpbias_mmc_omap2430w@-hclocks+mcbsp5_mux_fck@68ti,composite-mux-clock|xhh mcbsp5_fckti,composite-clock| hmcbsp1_mux_fck@4ti,composite-mux-clock|xh mcbsp1_fckti,composite-clock| hmcbsp2_mux_fck@4ti,composite-mux-clock| xhmcbsp2_fckti,composite-clock|hmcbsp3_mux_fck@68ti,composite-mux-clock| xhhmcbsp3_fckti,composite-clock|hmcbsp4_mux_fck@68ti,composite-mux-clock| xhhmcbsp4_fckti,composite-clock|hclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \+7pinmux_wlan_host_wkup_pinsTtarget-module@480a6000ti,sysc-omap2ti,syscxH `DH `HH `Lrevsyscsyss |ick+ H ` aes1@0 ti,omap3-aesxP  txrxtarget-module@480c5000ti,sysc-omap2ti,syscxH PDH PHH PLrevsyscsyss |ick+ H P aes2@0 ti,omap3-aesxPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocks+virt_16_8m_ck fixed-clockYhosc_sys_ck@d40 ti,mux-clock|x @hsys_ck@1270ti,divider-clock|!xp,h"sys_clkout1@d70ti,gate-clock|x pdpll3_x2_ckfixed-factor-clock|CNdpll3_m2x2_ckfixed-factor-clock|CNh!dpll4_x2_ckfixed-factor-clock| CNcorex2_fckfixed-factor-clock|!CNh#wkup_l4_ickfixed-factor-clock|"CNhRcorex2_d3_fckfixed-factor-clock|#CNhcorex2_d5_fckfixed-factor-clock|#CNhclockdomainscm@48004000 ti,omap3-cmxH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockhDvirt_12m_ck fixed-clockhvirt_13m_ck fixed-clock]@hvirt_19200000_ck fixed-clock$hvirt_26000000_ck fixed-clockhvirt_38_4m_ck fixed-clockIhdpll4_ck@d00ti,omap3-dpll-per-j-type-clock|""x D 0h dpll4_m2_ck@d48ti,divider-clock| !?x H,h$dpll4_m2x2_mul_ckfixed-factor-clock|$CNh%dpll4_m2x2_ck@d00ti,hsdiv-gate-clock|%x Xh&omap_96m_alwon_fckfixed-factor-clock|&CNh-dpll3_ck@d00ti,omap3-dpll-core-clock|""x @ 0hdpll3_m3_ck@1140ti,divider-clock|!x@,h'dpll3_m3x2_mul_ckfixed-factor-clock|'CNh(dpll3_m3x2_ck@d00ti,hsdiv-gate-clock|( x Xh)emu_core_alwon_ckfixed-factor-clock|)CNhfsys_altclk fixed-clockh2mcbsp_clks fixed-clockhdpll3_m2_ck@d40ti,divider-clock|!x @,hcore_ckfixed-factor-clock|CNh*dpll1_fck@940ti,divider-clock|*!x @,h+dpll1_ck@904ti,omap3-dpll-clock|"+x  $ @ 4hdpll1_x2_ckfixed-factor-clock|CNh,dpll1_x2m2_ck@944ti,divider-clock|,!x D,h@cm_96m_fckfixed-factor-clock|-CNh.omap_96m_fck@d40 ti,mux-clock|."x @hIdpll4_m3_ck@e40ti,divider-clock| ! x@,h/dpll4_m3x2_mul_ckfixed-factor-clock|/CNh0dpll4_m3x2_ck@d00ti,hsdiv-gate-clock|0x Xh1omap_54m_fck@d40 ti,mux-clock|12x @h<cm_96m_d2_fckfixed-factor-clock|.CNh3omap_48m_fck@d40 ti,mux-clock|32x @h4omap_12m_fckfixed-factor-clock|4CNhKdpll4_m4_ck@e40ti,divider-clock| !x@,h5dpll4_m4x2_mul_ckti,fixed-factor-clock|5n|h6dpll4_m4x2_ck@d00ti,gate-clock|6x Xhdpll4_m5_ck@f40ti,divider-clock| !?x@,h7dpll4_m5x2_mul_ckti,fixed-factor-clock|7n|h8dpll4_m5x2_ck@d00ti,hsdiv-gate-clock|8x Xhndpll4_m6_ck@1140ti,divider-clock| !?x@,h9dpll4_m6x2_mul_ckfixed-factor-clock|9CNh:dpll4_m6x2_ck@d00ti,hsdiv-gate-clock|:x Xh;emu_per_alwon_ckfixed-factor-clock|;CNhgclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock|*x ph=clkout2_src_mux_ck@d70ti,composite-mux-clock|*".<x ph>clkout2_src_ckti,composite-clock|=>h?sys_clkout2@d70ti,divider-clock|?!@x pmpu_ckfixed-factor-clock|@CNhAarm_fck@924ti,divider-clock|Ax $!emu_mpu_alwon_ckfixed-factor-clock|ACNhhl3_ick@a40ti,divider-clock|*!x @,hBl4_ick@a40ti,divider-clock|B!x @,hCrm_ick@c40ti,divider-clock|C!x @,gpt10_gate_fck@a00ti,composite-gate-clock|" x hEgpt10_mux_fck@a40ti,composite-mux-clock|D"x @hFgpt10_fckti,composite-clock|EFgpt11_gate_fck@a00ti,composite-gate-clock|" x hGgpt11_mux_fck@a40ti,composite-mux-clock|D"x @hHgpt11_fckti,composite-clock|GHcore_96m_fckfixed-factor-clock|ICNhmmchs2_fck@a00ti,wait-gate-clock|x hmmchs1_fck@a00ti,wait-gate-clock|x hi2c3_fck@a00ti,wait-gate-clock|x hi2c2_fck@a00ti,wait-gate-clock|x hi2c1_fck@a00ti,wait-gate-clock|x hmcbsp5_gate_fck@a00ti,composite-gate-clock| x h mcbsp1_gate_fck@a00ti,composite-gate-clock| x h core_48m_fckfixed-factor-clock|4CNhJmcspi4_fck@a00ti,wait-gate-clock|Jx hmcspi3_fck@a00ti,wait-gate-clock|Jx hmcspi2_fck@a00ti,wait-gate-clock|Jx hmcspi1_fck@a00ti,wait-gate-clock|Jx huart2_fck@a00ti,wait-gate-clock|Jx huart1_fck@a00ti,wait-gate-clock|Jx  hcore_12m_fckfixed-factor-clock|KCNhLhdq_fck@a00ti,wait-gate-clock|Lx hcore_l3_ickfixed-factor-clock|BCNhMsdrc_ick@a10ti,wait-gate-clock|Mx hgpmc_fckfixed-factor-clock|MCNcore_l4_ickfixed-factor-clock|CCNhNmmchs2_ick@a10ti,omap3-interface-clock|Nx hmmchs1_ick@a10ti,omap3-interface-clock|Nx hhdq_ick@a10ti,omap3-interface-clock|Nx hmcspi4_ick@a10ti,omap3-interface-clock|Nx hmcspi3_ick@a10ti,omap3-interface-clock|Nx hmcspi2_ick@a10ti,omap3-interface-clock|Nx hmcspi1_ick@a10ti,omap3-interface-clock|Nx hi2c3_ick@a10ti,omap3-interface-clock|Nx hi2c2_ick@a10ti,omap3-interface-clock|Nx hi2c1_ick@a10ti,omap3-interface-clock|Nx huart2_ick@a10ti,omap3-interface-clock|Nx huart1_ick@a10ti,omap3-interface-clock|Nx  hgpt11_ick@a10ti,omap3-interface-clock|Nx  hgpt10_ick@a10ti,omap3-interface-clock|Nx  hmcbsp5_ick@a10ti,omap3-interface-clock|Nx  hmcbsp1_ick@a10ti,omap3-interface-clock|Nx  homapctrl_ick@a10ti,omap3-interface-clock|Nx hdss_tv_fck@e00ti,gate-clock|<xhdss_96m_fck@e00ti,gate-clock|Ixhdss2_alwon_fck@e00ti,gate-clock|"xhdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock|"x hOgpt1_mux_fck@c40ti,composite-mux-clock|D"x @hPgpt1_fckti,composite-clock|OPhaes2_ick@a10ti,omap3-interface-clock|Nx hwkup_32k_fckfixed-factor-clock|DCNhQgpio1_dbck@c00ti,gate-clock|Qx hsha12_ick@a10ti,omap3-interface-clock|Nx hwdt2_fck@c00ti,wait-gate-clock|Qx hwdt2_ick@c10ti,omap3-interface-clock|Rx hwdt1_ick@c10ti,omap3-interface-clock|Rx hgpio1_ick@c10ti,omap3-interface-clock|Rx homap_32ksync_ick@c10ti,omap3-interface-clock|Rx hgpt12_ick@c10ti,omap3-interface-clock|Rx hgpt1_ick@c10ti,omap3-interface-clock|Rx hper_96m_fckfixed-factor-clock|-CNh per_48m_fckfixed-factor-clock|4CNhSuart3_fck@1000ti,wait-gate-clock|Sx hgpt2_gate_fck@1000ti,composite-gate-clock|"xhTgpt2_mux_fck@1040ti,composite-mux-clock|D"x@hUgpt2_fckti,composite-clock|TUhgpt3_gate_fck@1000ti,composite-gate-clock|"xhVgpt3_mux_fck@1040ti,composite-mux-clock|D"x@hWgpt3_fckti,composite-clock|VWgpt4_gate_fck@1000ti,composite-gate-clock|"xhXgpt4_mux_fck@1040ti,composite-mux-clock|D"x@hYgpt4_fckti,composite-clock|XYgpt5_gate_fck@1000ti,composite-gate-clock|"xhZgpt5_mux_fck@1040ti,composite-mux-clock|D"x@h[gpt5_fckti,composite-clock|Z[gpt6_gate_fck@1000ti,composite-gate-clock|"xh\gpt6_mux_fck@1040ti,composite-mux-clock|D"x@h]gpt6_fckti,composite-clock|\]gpt7_gate_fck@1000ti,composite-gate-clock|"xh^gpt7_mux_fck@1040ti,composite-mux-clock|D"x@h_gpt7_fckti,composite-clock|^_gpt8_gate_fck@1000ti,composite-gate-clock|" xh`gpt8_mux_fck@1040ti,composite-mux-clock|D"x@hagpt8_fckti,composite-clock|`agpt9_gate_fck@1000ti,composite-gate-clock|" xhbgpt9_mux_fck@1040ti,composite-mux-clock|D"x@hcgpt9_fckti,composite-clock|bcper_32k_alwon_fckfixed-factor-clock|DCNhdgpio6_dbck@1000ti,gate-clock|dxhgpio5_dbck@1000ti,gate-clock|dxhgpio4_dbck@1000ti,gate-clock|dxhgpio3_dbck@1000ti,gate-clock|dxhgpio2_dbck@1000ti,gate-clock|dx hwdt3_fck@1000ti,wait-gate-clock|dx hper_l4_ickfixed-factor-clock|CCNhegpio6_ick@1010ti,omap3-interface-clock|exhgpio5_ick@1010ti,omap3-interface-clock|exhgpio4_ick@1010ti,omap3-interface-clock|exhgpio3_ick@1010ti,omap3-interface-clock|exhgpio2_ick@1010ti,omap3-interface-clock|ex hwdt3_ick@1010ti,omap3-interface-clock|ex huart3_ick@1010ti,omap3-interface-clock|ex huart4_ick@1010ti,omap3-interface-clock|exhgpt9_ick@1010ti,omap3-interface-clock|ex hgpt8_ick@1010ti,omap3-interface-clock|ex hgpt7_ick@1010ti,omap3-interface-clock|exhgpt6_ick@1010ti,omap3-interface-clock|exhgpt5_ick@1010ti,omap3-interface-clock|exhgpt4_ick@1010ti,omap3-interface-clock|exhgpt3_ick@1010ti,omap3-interface-clock|exhgpt2_ick@1010ti,omap3-interface-clock|exhmcbsp2_ick@1010ti,omap3-interface-clock|exhmcbsp3_ick@1010ti,omap3-interface-clock|exhmcbsp4_ick@1010ti,omap3-interface-clock|exhmcbsp2_gate_fck@1000ti,composite-gate-clock|xhmcbsp3_gate_fck@1000ti,composite-gate-clock|xhmcbsp4_gate_fck@1000ti,composite-gate-clock|xhemu_src_mux_ck@1140 ti,mux-clock|"fghx@hiemu_src_ckti,clkdm-gate-clock|ihjpclk_fck@1140ti,divider-clock|j!x@,pclkx2_fck@1140ti,divider-clock|j!x@,atclk_fck@1140ti,divider-clock|j!x@,traceclk_src_fck@1140 ti,mux-clock|"fghx@hktraceclk_fck@1140ti,divider-clock|k !x@,secure_32k_fck fixed-clockhlgpt12_fckfixed-factor-clock|lCNhwdt1_fckfixed-factor-clock|lCNsecurity_l4_ick2fixed-factor-clock|CCNhmaes1_ick@a14ti,omap3-interface-clock|mx hrng_ick@a14ti,omap3-interface-clock|mx hsha11_ick@a14ti,omap3-interface-clock|mx des1_ick@a14ti,omap3-interface-clock|mx cam_mclk@f00ti,gate-clock|nxcam_ick@f10!ti,omap3-no-wait-interface-clock|Cxhcsi2_96m_fck@f00ti,gate-clock|xhsecurity_l3_ickfixed-factor-clock|BCNhopka_ick@a14ti,omap3-interface-clock|ox icr_ick@a10ti,omap3-interface-clock|Nx des2_ick@a10ti,omap3-interface-clock|Nx mspro_ick@a10ti,omap3-interface-clock|Nx mailboxes_ick@a10ti,omap3-interface-clock|Nx ssi_l4_ickfixed-factor-clock|CCNhvsr1_fck@c00ti,wait-gate-clock|"x hsr2_fck@c00ti,wait-gate-clock|"x hsr_l4_ickfixed-factor-clock|CCNdpll2_fck@40ti,divider-clock|*!x@,hpdpll2_ck@4ti,omap3-dpll-clock|"px$@4hqdpll2_m2_ck@44ti,divider-clock|q!xD,hriva2_ck@0ti,wait-gate-clock|rxhmodem_fck@a00ti,omap3-interface-clock|"x hsad2d_ick@a10ti,omap3-interface-clock|Bx hmad2d_ick@a18ti,omap3-interface-clock|Bx hmspro_fck@a00ti,wait-gate-clock|x ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock|#x hsssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock|#x @$htssi_ssr_fck_3430es2ti,composite-clock|sthussi_sst_fck_3430es2fixed-factor-clock|uCNhhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clock|Mx hssi_ick_3430es2@a10ti,omap3-ssi-interface-clock|vx husim_gate_fck@c00ti,composite-gate-clock|I x hsys_d2_ckfixed-factor-clock|"CNhxomap_96m_d2_fckfixed-factor-clock|ICNhyomap_96m_d4_fckfixed-factor-clock|ICNhzomap_96m_d8_fckfixed-factor-clock|ICNh{omap_96m_d10_fckfixed-factor-clock|ICN h|dpll5_m2_d4_ckfixed-factor-clock|wCNh}dpll5_m2_d8_ckfixed-factor-clock|wCNh~dpll5_m2_d16_ckfixed-factor-clock|wCNhdpll5_m2_d20_ckfixed-factor-clock|wCNhusim_mux_fck@c40ti,composite-mux-clock(|"xyz{|}~x @,husim_fckti,composite-clock|usim_ick@c10ti,omap3-interface-clock|Rx  hdpll5_ck@d04ti,omap3-dpll-clock|""x  $ L 4hdpll5_m2_ck@d50ti,divider-clock|!x P,hwsgx_gate_fck@b00ti,composite-gate-clock|*x hcore_d3_ckfixed-factor-clock|*CNhcore_d4_ckfixed-factor-clock|*CNhcore_d6_ckfixed-factor-clock|*CNhomap_192m_alwon_fckfixed-factor-clock|&CNhcore_d2_ckfixed-factor-clock|*CNhsgx_mux_fck@b40ti,composite-mux-clock |.x @hsgx_fckti,composite-clock|h sgx_ick@b10ti,wait-gate-clock|Bx hcpefuse_fck@a08ti,gate-clock|"x hts_fck@a08ti,gate-clock|Dx husbtll_fck@a08ti,wait-gate-clock|wx husbtll_ick@a18ti,omap3-interface-clock|Nx hmmchs3_ick@a10ti,omap3-interface-clock|Nx hmmchs3_fck@a00ti,wait-gate-clock|x hdss1_alwon_fck_3430es2@e00ti,dss-gate-clock|xhdss_ick_3430es2@e10ti,omap3-dss-interface-clock|Cxhusbhost_120m_fck@1400ti,gate-clock|wxhusbhost_48m_fck@1400ti,dss-gate-clock|4xhusbhost_ick@1410ti,omap3-dss-interface-clock|Cxhuart4_fck@1000ti,wait-gate-clock|Sxhclockdomainscore_l3_clkdmti,clockdomain|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainl|emu_clkdmti,clockdomain|jdpll4_clkdmti,clockdomain| wkup_clkdmti,clockdomain$|dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|cam_clkdmti,clockdomain|iva2_clkdmti,clockdomain|dpll2_clkdmti,clockdomain|qd2d_clkdmti,clockdomain |dpll5_clkdmti,clockdomain|sgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |target-module@48320000ti,sysc-omap2ti,syscxH2H2 revsysc|Qfckick+ H2counter@0ti,omap-counter32kx interrupt-controller@48200000ti,omap3-intcxH htarget-module@48056000ti,sysc-omap2ti,syscxH`H`,H`(revsyscsyss#  |Mick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdmax  `hgpio@48310000ti,omap3-gpioxH1gpio11Agpio@49050000ti,omap3-gpioxIgpio21Agpio@49052000ti,omap3-gpioxI gpio31Agpio@49054000ti,omap3-gpioxI@ gpio41Ahgpio@49056000ti,omap3-gpioxI`!gpio51Ahgpio@49058000ti,omap3-gpioxI"gpio61Ahserial@4806a000ti,omap3-uartxH MH12txrxuart1ladefaultoserial@4806c000ti,omap3-uartxHMI34txrxuart2ladefaultoserial@49020000ti,omap3-uartxIMJ56txrxuart3ladefaultoi2c@48070000 ti,omap3-i2cxH8txrx+i2c1'@twl@48xH  ti,twl4030rtcti,twl4030-rtc bciti,twl4030-bci y vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' hregulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0hregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5hregulator-vusb1v8ti,twl4030-vusb1v8hregulator-vusb3v1ti,twl4030-vusb3v1hregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-hgpioti,twl4030-gpio1Atwl4030-usbti,twl4030-usb hpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad madcti,twl4030-madchi2c@48072000 ti,omap3-i2cxH 9txrx+i2c2i2c@48060000 ti,omap3-i2cxH=txrx+i2c3tvp5146@5c ti,tvp5146m2x\mailbox@48094000ti,omap3-mailboxmailboxxH @.:Ldsp ^ ispi@48098000ti,omap2-mcspixH A+mcspi1t@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH B+mcspi2t +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [+mcspi3t tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0+mcspi4tFGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1=>txrxadefaultommc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrxmmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrxadefaulto+wlcore@2 ti,wl1271x mmu@480bd400ti,omap2-iommuxH mmu_isphmmu@5d000000ti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@mpu ;< commontxrx(mcbsp1 txrx|fck disabledtarget-module@480a0000ti,sysc-omap2ti,syscxH <H @H Drevsyscsyss|ick+ H rng@0 ti,omap2-rngx 4mcbsp@49022000ti,omap3-mcbspxI I mpusidetone>?commontxrxsidetone(mcbsp2mcbsp2_sidetone!"txrx|fckick disabledmcbsp@49024000ti,omap3-mcbspxI@I mpusidetoneYZcommontxrxsidetone(mcbsp3mcbsp3_sidetonetxrx|fckick disabledmcbsp@49026000ti,omap3-mcbspxI`mpu 67 commontxrx(mcbsp4txrx|fck7 disabledmcbsp@48096000ti,omap3-mcbspxH `mpu QR commontxrx(mcbsp5txrx|fck disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxtarget-module@48318000ti,sysc-omap2-timerti,syscxH1H1H1revsyscsyss' |fckick+ H1H\timer@0ti,omap3430-timerx|fck%gvDtarget-module@49032000ti,sysc-omap2-timerti,syscxI I I revsyscsyss' |fckick+ I timer@0ti,omap3430-timerx&timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5timer@4903a000ti,omap3430-timerxI*timer6timer@4903c000ti,omap3430-timerxI+timer7timer@4903e000ti,omap3430-timerxI,timer8timer@49040000ti,omap3430-timerxI-timer9timer@48086000ti,omap3430-timerxH`.timer10timer@48088000ti,omap3430-timerxH/timer11target-module@48304000ti,sysc-omap2-timerti,syscxH0@H0@H0@revsyscsyss' |fckick+ H0@timer@0ti,omap3430-timerx_gusbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hs+ohci@48064400ti,ohci-omap3xHDLehci@48064800 ti,ehci-omapxHHMgpmc@6e000000ti,omap3430-gpmcgpmcxnrxtx+1A ,ethernet@gpmcsmsc,lan9221smsc,lan91154N\n(--x :KQKk x uart@3,0 ns16550a x  /4N\n((-- :Qk-uart@3,1 ns16550a x  uart@3,2 ns16550a x  uart@3,3 ns16550a x  usb_otg_hs@480ab000ti,omap3-musbxH \]mcdma usb_otg_hs=HP Yhp2dss@48050000 ti,omap3-dssxH disabled dss_core|fck+dispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H protophypll disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  disabled dss_venc|fcktv_dac_clkssi-controller@48058000 ti,omap3-ssissiokxHHsysgddGgdd_mpu+ |u ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portxHHtxrxCDssi-port@4805b000ti,omap3-ssi-portxHHtxrxEFserial@49042000ti,omap3-uartxI PQRtxrxuart4l disabledregulator-abb-mpu ti,abb-v1 wabb_mpu_iva+xH0rH0hbase-addressint-addressv|"`sO7hpinmux@480025a0 ti,omap3-padconfpinctrl-singlexH%\+7pinmux_mmc3_2_pins(T8DFHBhisp@480bc000 ti,omap3-ispxH H pports+bandgap@48002524xH%$ti,omap36xx-bandgaph target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_corexH 8sysc |fck+ H smartreflex@0ti,omap3-smartreflex-corextarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaxH 8sysc |fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivaxtarget-module@50000000ti,sysc-omap4ti,syscxPP revsysc  | fckick+ Popp-tableoperating-points-v2-ti-cpuphopp50-300000000ssssss opp100-600000000#FOOOOOOopp130-800000000/777777opp1g-1000000000; opp_supplyti,omap-opp-supply "thermal-zonescpu_thermal = S aN  n regulator-vddvarioregulator-fixed wvddvario ~hregulator-vdd33aregulator-fixedwvdd33a ~hmemory@80000000lmemoryx wl12xx_vmmcadefaulto regulator-fixedwvwl1271w@w@  p h compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supplycpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthnon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesstatusinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressreg-shiftcurrent-speedgpmc,mux-add-datagpmc,wait-pinmultipointnum-epsram-bitsinterface-typeusb-phypowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorsregulator-always-ongpiostartup-delay-usenable-active-high