8('netxeon,r89rockchip,rk3288& 7Netxeon R89aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbcpu-opp-tableoperating-points-v2jbopp-126000000u| opp-216000000u | opp-312000000u| opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ| opp-1608000000u_"|pbus simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkbdma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkbRreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n65timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystemL mmc@ff0c0000rockchip,rk3288-dw-mshcRр 5Drvbiuciuciu-driveciu-sample`  @kresetokaywdefault mmc@ff0d0000rockchip,rk3288-dw-mshcRр 5Eswbiuciuciu-driveciu-sample` ! @kreset disabledmmc@ff0e0000rockchip,rk3288-dw-mshcRр 5Ftxbiuciuciu-driveciu-sample` "@kreset disabledmmc@ff0f0000rockchip,rk3288-dw-mshcRр 5Guybiuciuciu-driveciu-sample` #@kreset disabledsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW ksaradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default  disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault! disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault" disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault# disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault$okayserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7)5MUbaudclkapb_pclktxrxdefault%okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8)5NVbaudclkapb_pclktxrxdefault&okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9)5OWbaudclkapb_pclkdefault'okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :)5PXbaudclkapb_pclktxrxdefault(okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;)5QYbaudclkapb_pclk  txrxdefault)okaythermal-zonesreserve_thermal6LZ*cpu_thermal6dLZ*tripscpu_alert0jpvpassiveb+cpu_alert1j$vpassiveb,cpu_critj_v criticalcooling-mapsmap0+0map1,0gpu_thermal6dLZ*tripsgpu_alert0jpvpassiveb-gpu_critj_v criticalcooling-mapsmap0- .tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk ktsadc-apbinitdefaultsleep/0/1sokayb*ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq185fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB kstmmacethok%20rgmii9input F3V l'B@4default50usb@ff500000 generic-ehciP 56usbokayusb@ff520000 generic-ohciR )56usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost7 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg @@ 8 usb2-phyokayusb@ff5c0000 generic-ehci\ 5 disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Ldefault9okaypmic@40silergy,syr827@5VDD_CPUD,` Pxp@:b pmic@41silergy,syr828A5VDD_GPUD,` Pxp@:rtc@51haoyu,hym8563Qxin32k&;default<pmic@5aactive-semi,act8846Zdefault=>regulatorsREG15VCC_DDR`OxOREG25VCC_IO`2Zx2ZbwREG35VDD_LOG`B@xB@REG45VCC_20`xREG5 5VCCIO_SD`2Zx2ZbREG6 5VDD10_LCD`B@xB@REG75VCC_WL`2Zx2ZREG85VCCA_33`2Zx2ZREG95VCC_LAN`2Zx2Zb2REG105VDD_10`B@xB@REG115VCC_18`w@xw@bREG12 5VCC18_LCD`w@xw@i2c@ff660000rockchip,rk3288-i2cf =i2c5Ndefault? disabledpwm@ff680000rockchip,rk3288-pwmhdefault@5_pwmokaypwm@ff680010rockchip,rk3288-pwmhdefaultA5_pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultB5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultC5_pwm disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controllerh bUpd_vio@9 5chgfdehilkj$ DEFGHIJKLpd_hevc@11 5op MNpd_video@12 5 Opd_gpu@13 5 PQreboot-modesyscon-reboot-modeRB'RB5RB ERBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv1QHjk$^#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb1edp-phyrockchip,rk3288-dp-phy5h24ms disabledbeio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320s 5]phyclk kphy-resetb8usb-phy@334s45^phyclk kphy-resetb6usb-phy@348sH5_phyclk kphy-resetb7watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif~5T mclkhclkRtx 6defaultS1 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s~ 55Ri2s_clki2s_hclkRRtxrxdefaultT disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk kcrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkU ilm kcoreaxiahbvop@ff930000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vopU def kaxiahbdclkVokayportb endpoint@0Wbhendpoint@1Xbfendpoint@2Yb`endpoint@3Zbciommu@ff930300rockchip,iommu  vopb_mmu5 aclkifaceU okaybVvop@ff940000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vopU  kaxiahbdclk[okayportb endpoint@0\biendpoint@1]bgendpoint@2^baendpoint@3_bdiommu@ff940300rockchip,iommu  vopl_mmu5 aclkifaceU okayb[mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkU 1 disabledportsportendpoint@0`bYendpoint@1ab^lvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcbU 1 disabledportsport@0endpoint@0cbZendpoint@1db_dp@ff970000rockchip,rk3288-dp@ b5icdppclkedpokdp1 disabledportsport@0endpoint@0fbXendpoint@1gb]hdmi@ff980000rockchip,rk3288-dw-hdmi)~1 g5hmniahbisfrcecU okayportsportendpoint@0hbWendpoint@1ib\video-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclkjU iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkifaceU bjiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5kU  disabledb.gpu-opp-tableoperating-points-v2bkopp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000syscon bPqos@ffaa0080syscon bQqos@ffad0000syscon bEqos@ffad0100syscon bFqos@ffad0180syscon bGqos@ffad0400syscon bHqos@ffad0480syscon bIqos@ffad0500syscon bDqos@ffad0800syscon bJqos@ffad0880syscon bKqos@ffad0900syscon bLqos@ffae0000syscon bOqos@ffaf0000syscon bMqos@ffaf0080syscon bNefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400&@ @ `   bpinctrlrockchip,rk3288-pinctrl1gpio0@ff750000rockchip,gpio-banku Q5@7G&b;gpio1@ff780000rockchip,gpio-bankx R5A7G&gpio2@ff790000rockchip,gpio-banky S5B7G&gpio3@ff7a0000rockchip,gpio-bankz T5C7G&gpio4@ff7b0000rockchip,gpio-bank{ U5D7G&b3gpio5@ff7c0000rockchip,gpio-bank| V5E7G&gpio6@ff7d0000rockchip,gpio-bank} W5F7G&gpio7@ff7e0000rockchip,gpio-bank~ X5G7G&bsgpio8@ff7f0000rockchip,gpio-bank Y5H7G&hdmihdmi-cec-c0Slhdmi-cec-c7Slhdmi-ddc Sllhdmi-ddc-unwedge Smlpcfg-output-lowabmpcfg-pull-uplbnpcfg-pull-downybopcfg-pull-noneblpcfg-pull-none-12ma bpsleepglobal-pwroffSlddrio-pwroffSlddr0-retentionSnddr1-retentionSnedpedp-hpdS oi2c0i2c0-xfer Sllb9i2c1i2c1-xfer Sllb!i2c2i2c2-xfer S l lb?i2c3i2c3-xfer Sllb"i2c4i2c4-xfer Sllb#i2c5i2c5-xfer Sllb$i2s0i2s0-bus`SllllllbTlcdclcdc-ctl@Sllllbbsdmmcsdmmc-clkSlb sdmmc-cmdSnbsdmmc-cdSnbsdmmc-bus1Snsdmmc-bus4@Snnnnbsdio0sdio0-bus1Snsdio0-bus4@Snnnnsdio0-cmdSnsdio0-clkSlsdio0-cdSnsdio0-wpSnsdio0-pwrSnsdio0-bkpwrSnsdio0-intSnsdio1sdio1-bus1Snsdio1-bus4@Snnnnsdio1-cdSnsdio1-wpSnsdio1-bkpwrSnsdio1-intSnsdio1-cmdSnsdio1-clkSlsdio1-pwrS nemmcemmc-clkSlemmc-cmdSnemmc-pwrS nemmc-bus1Snemmc-bus4@Snnnnemmc-bus8Snnnnnnnnspi0spi0-clkS nbspi0-cs0S nbspi0-txSnbspi0-rxSnbspi0-cs1Snspi1spi1-clkS nbspi1-cs0S nbspi1-rxSnbspi1-txSnbspi2spi2-cs1Snspi2-clkSnbspi2-cs0Snb spi2-rxSnbspi2-txS nbuart0uart0-xfer Snlb%uart0-ctsSnuart0-rtsSluart1uart1-xfer Sn lb&uart1-ctsS nuart1-rtsS luart2uart2-xfer Snlb'uart3uart3-xfer Snlb(uart3-ctsS nuart3-rtsS luart4uart4-xfer Snlb)uart4-ctsS nuart4-rtsS ltsadcotp-pinS lb/otp-outS lb0pwm0pwm0-pinSlb@pwm1pwm1-pinSlbApwm2pwm2-pinSlbBpwm3pwm3-pinSlbCgmacrgmii-pinsSllllpppplll ppllb5rmii-pinsSllllllllllspdifspdif-txS lbSpcfg-output-highbqact8846pmic-vselSmb=pwr-holdSqb>buttonspwrbtnSnbririr-intSnbtpmicpmic-intSnb<usbhost-vbus-drvSlbuotg-vbus-drvS lbvmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacb4gpio-keys gpio-keysdefaultrpower ;tGPIO Key Powerdir-receivergpio-ir-receiver sdefaulttvcc-host-regulatorregulator-fixed Q;defaultu 5vcc_hostvcc-otg-regulatorregulator-fixed Q; defaultv5vcc_otgsdmmc-regulatorregulator-fixed 5sdmmc-supply`2Zx2Z Qs wbsys-regulatorregulator-fixed 5sys-supply`LK@xLK@b: #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supply#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplysystem-power-controller#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us