E88( %amarula,vyasa-rk3288rockchip,rk3288&7Amarula Vyasa-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbcpu-opp-tableoperating-points-v2jbopp-126000000u| opp-216000000u | opp-312000000u| opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ| opp-1608000000u_"|pbus simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkbdma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkb[reserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n65timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystemL mmc@ff0c0000rockchip,rk3288-dw-mshcRр 5Drvbiuciuciu-driveciu-sample`  @kresetokaywdefault mmc@ff0d0000rockchip,rk3288-dw-mshcRр 5Eswbiuciuciu-driveciu-sample` ! @kreset disabledmmc@ff0e0000rockchip,rk3288-dw-mshcRр 5Ftxbiuciuciu-driveciu-sample` "@kreset disabledmmc@ff0f0000rockchip,rk3288-dw-mshcRр 5Guybiuciuciu-driveciu-sample` #@kresetokaywdefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW ksaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault(okaybqserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7!+5MUbaudclkapb_pclktxrxdefault) disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8!+5NVbaudclkapb_pclktxrxdefault* disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9!+5OWbaudclkapb_pclkdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :!+5PXbaudclkapb_pclktxrxdefault, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;!+5QYbaudclkapb_pclk  txrxdefault- disabledthermal-zonesreserve_thermal8N\.cpu_thermal8dN\.tripscpu_alert0lpxpassiveb/cpu_alert1l$xpassiveb0cpu_critl_x criticalcooling-mapsmap0/0map100gpu_thermal8dN\.tripsgpu_alert0lpxpassiveb1gpu_critl_x criticalcooling-mapsmap01 2tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk ktsadc-apbinitdefaultsleep3435sokayb.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq585fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB kstmmacethokay'76Ninputdefault789:[;frgmiio 'B@ <0usb@ff500000 generic-ehciP 5=usbokayusb@ff520000 generic-ohciR )5=usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost> usb2-phyokaydefault?usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg @@ @ usb2-phyokayAusb@ff5c0000 generic-ehci\ 5 disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LdefaultBokaypmic@1brockchip,rk808&Cxin32krk808-clkout2defaultDE&GUFaFmFyFFFFFFregulatorsDCDC_REG1vdd_arm qp/b regulator-state-memADCDC_REG2vdd_gpu P/bvregulator-state-memZrB@DCDC_REG3vcc_ddr/regulator-state-memZDCDC_REG4vcc_io2Z2Z/bregulator-state-memZr2ZLDO_REG1vcc_tp2Z2Z/regulator-state-memZr2ZLDO_REG2 vcc_codec2Z2Z/regulator-state-memALDO_REG3vdd_10B@B@/regulator-state-memZrB@LDO_REG4vcc_gpsw@w@/regulator-state-memZrw@LDO_REG5 vccio_sdw@2Z/bregulator-state-memZr2ZLDO_REG6 vdd10_lcdB@B@/regulator-state-memZrB@LDO_REG7vcc_18w@w@/bZregulator-state-memZrw@LDO_REG8 vcc18_lcdw@w@/regulator-state-memZrw@SWITCH_REG1vcc_sd2Z2Z/bregulator-state-memZSWITCH_REG2vcc_lan2Z2Z/b;regulator-state-memZi2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultG disabledpwm@ff680000rockchip,rk3288-pwmhdefaultH5_pwm disabledpwm@ff680010rockchip,rk3288-pwmhdefaultI5_pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultJ5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultK5_pwm disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controller'h7 b^pd_vio@9 5chgfdehilkj$LMNOPQRSTpd_hevc@11 5opUVpd_video@12 5Wpd_gpu@13 5XYreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5H'jk$#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb5edp-phyrockchip,rk3288-dp-phy5h24m disabledbnio-domains"rockchip,rk3288-io-voltage-domainokayZ+5@ZN;\jsZusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclk kphy-resetb@usb-phy@33445^phyclk kphy-resetb=usb-phy@348H5_phyclk kphy-resetb>watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif5T mclkhclk[tx 6default\5 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 55Ri2s_clki2s_hclk[[txrxdefault] disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk kcrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk^ ilm kcoreaxiahbvop@ff930000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vop^ def kaxiahbdclk_okayportb endpoint@0`brendpoint@1aboendpoint@2bbiendpoint@3cbliommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface^ okayb_vop@ff940000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vop^  kaxiahbdclkdokayportb endpoint@0ebsendpoint@1fbpendpoint@2gbjendpoint@3hbmiommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface^ okaybdmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk^ 5 disabledportsportendpoint@0ibbendpoint@1jbglvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdck^ 5 disabledportsport@0endpoint@0lbcendpoint@1mbhdp@ff970000rockchip,rk3288-dp@ b5icdppclkndpokdp5 disabledportsport@0endpoint@0obaendpoint@1pbfhdmi@ff980000rockchip,rk3288-dw-hdmi+5 g5hmniahbisfrcec^ okay,qportsportendpoint@0rb`endpoint@1sbevideo-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclkt^ iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface^ btiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5u^ okay8vb2gpu-opp-tableoperating-points-v2buopp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000syscon bXqos@ffaa0080syscon bYqos@ffad0000syscon bMqos@ffad0100syscon bNqos@ffad0180syscon bOqos@ffad0400syscon bPqos@ffad0480syscon bQqos@ffad0500syscon bLqos@ffad0800syscon bRqos@ffad0880syscon bSqos@ffad0900syscon bTqos@ffae0000syscon bWqos@ffaf0000syscon bUqos@ffaf0080syscon bVefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400DY@ @ `   bpinctrlrockchip,rk3288-pinctrl5gpio0@ff750000rockchip,gpio-banku Q5@jzDYbCgpio1@ff780000rockchip,gpio-bankx R5AjzDYgpio2@ff790000rockchip,gpio-banky S5BjzDYgpio3@ff7a0000rockchip,gpio-bankz T5CjzDYgpio4@ff7b0000rockchip,gpio-bank{ U5DjzDYb<gpio5@ff7c0000rockchip,gpio-bank| V5EjzDYgpio6@ff7d0000rockchip,gpio-bank} W5FjzDYgpio7@ff7e0000rockchip,gpio-bank~ X5GjzDYb~gpio8@ff7f0000rockchip,gpio-bank Y5HjzDYbhdmihdmi-cec-c0whdmi-cec-c7whdmi-ddc wwhdmi-ddc-unwedge xwvcc50-hdmi-en wbpcfg-output-lowbxpcfg-pull-upbypcfg-pull-downbzpcfg-pull-nonebwpcfg-pull-none-12ma b{sleepglobal-pwroffwbEddrio-pwroffwddr0-retentionyddr1-retentionyedpedp-hpd zi2c0i2c0-xfer wwbBi2c1i2c1-xfer wwb%i2c2i2c2-xfer  w wbGi2c3i2c3-xfer wwb&i2c4i2c4-xfer wwb'i2c5i2c5-xfer wwb(i2s0i2s0-bus`wwwwwwb]lcdclcdc-ctl@wwwwbksdmmcsdmmc-clkwb sdmmc-cmdybsdmmc-cdybsdmmc-bus1ysdmmc-bus4@yyyybsdio0sdio0-bus1ysdio0-bus4@yyyysdio0-cmdysdio0-clkwsdio0-cdysdio0-wpysdio0-pwrysdio0-bkpwrysdio0-intysdio1sdio1-bus1ysdio1-bus4@yyyysdio1-cdysdio1-wpysdio1-bkpwrysdio1-intysdio1-cmdysdio1-clkwsdio1-pwr yemmcemmc-clkwbemmc-cmdybemmc-pwr ybemmc-bus1yemmc-bus4@yyyyemmc-bus8yyyyyyyybspi0spi0-clk ybspi0-cs0 ybspi0-txybspi0-rxybspi0-cs1yspi1spi1-clk ybspi1-cs0 yb spi1-rxybspi1-txybspi2spi2-cs1yspi2-clkyb!spi2-cs0yb$spi2-rxyb#spi2-tx yb"uart0uart0-xfer ywb)uart0-ctsyuart0-rtswuart1uart1-xfer y wb*uart1-cts yuart1-rts wuart2uart2-xfer ywb+uart3uart3-xfer ywb,uart3-cts yuart3-rts wuart4uart4-xfer ywb-uart4-cts yuart4-rts wtsadcotp-pin wb3otp-out wb4pwm0pwm0-pinwbHpwm1pwm1-pinwbIpwm2pwm2-pinwbJpwm3pwm3-pinwbKgmacrgmii-pinswwww{{{{www {{wwb7rmii-pinswwwwwwwwwwphy-int yb:phy-pmebyb9phy-rst|b8spdifspdif-tx wb\pcfg-output-highb|pmicpmic-intybDusb_hostphy-pwr-en |b?usb2-pwr-en wbusb_otgotg-vbus-drv wbchosen/serial@ff690000memorymemorydc12-vbatregulator-fixed dc12_vbat/b}vboot-3v3regulator-fixed vboot_3v32Z2Z/}vsys-regulatorregulator-fixedvcc_sys8u 8u /}bFvboot-5vregulator-fixed vboot_svLK@LK@/}v3g-3v3regulator-fixedv3g_3v32Z2Z/}vsus-5vregulator-fixedvsus_5vLK@LK@/bvcc50-hdmiregulator-fixed vcc50_hdmi ~ default/vusb1-5vregulator-fixed vusb1_5v C defaultLK@LK@bAvusb2-5vregulator-fixed vusb2_5v  defaultLK@LK@/external-gmac-clock fixed-clocksY@ ext_gmacb6 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizevbus-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-suuplyflash1-supplygpio30-supplygpio1830lcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathvin-supplyenable-active-high