8ˌ( xTradxa,rockpi4rockchip,rk3399 +7Radxa ROCK Pi 4aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  % 0cpu@1cpuarm,cortex-a53pscid  % 0cpu@2cpuarm,cortex-a53pscid  % 0cpu@3cpuarm,cortex-a53pscid  % 0cpu@100cpuarm,cortex-a72psci   %0cpu@101cpuarm,cortex-a72psci   %0idle-states8pscicpu-sleeparm,idle-stateEVmx~0 cluster-sleeparm,idle-stateEVm~0 display-subsystemrockchip,display-subsystempmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mbus simple-bus+dma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclk0Zdma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclk0Ipcie@f8000000rockchip,rk3399-pcie ,axi-baseapb-base+6GS G aclkaclk-perfhclkpm0123]syslegacyclientm` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokay default *interrupt-controller:60ethernet@fe300000rockchip,rk3399-gmac0 ]macirq8ighfjfM stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macO stmmaceth]jokayuinputrgmiidefault   'P(mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@ р M biuciuciu-driveciu-sampleOyresetokay+#-:Ka!ldefault "#$zwifi@1brcm,bcm4329-fmac % ]host-wakedefault&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@A рu  L biuciuciu-driveciu-sampleOzresetokay#: %default'()*sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 uN N clk_xinclk_ahbemmc_cardclock+ phy_arasanOokay#l0usb@fe380000 generic-ehci8,-usbokayusb@fe3a0000 generic-ohci:,-usbokayusb@fe3c0000 generic-ehci<./usbokayusb@fe3e0000 generic-ohci> ./usbokayusb@fe800000rockchip,rk3399-dwc3+0G ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3i refbus_earlysuspendotg01usb2-phyusb3-phy utmi_wide$<]vOokayusb@fe900000rockchip,rk3399-dwc3+0G ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3n refbus_earlysuspendhost23usb2-phyusb3-phy utmi_wide$<]vOokaydp@fec00000rockchip,rk3399-cdn-dp ur  ruo core-clkpclkspdifgrf45O HJspdifdptxapbcore] disabledportsport+endpoint@060endpoint@170interrupt-controller@fee00000 arm,gic-v36+:P  0interrupt-controller@fee20000arm,gic-v3-its0ppi-partitionsinterrupt-partition-00interrupt-partition-10saradc@ff100000rockchip,rk3399-saradc>Pe saradcapb_pclk saradc-apbokayi2c@ff110000rockchip,rk3399-i2cuA AU  i2cpclk;default8+okay,2i2c@ff120000rockchip,rk3399-i2cuB BV  i2cpclk#default9+ disabledi2c@ff130000rockchip,rk3399-i2cuC CW  i2cpclk"default:+okay20i2c@ff140000rockchip,rk3399-i2cuD DX  i2cpclk&default;+ disabledi2c@ff150000rockchip,rk3399-i2cuE EY  i2cpclk%default<+ disabledi2c@ff160000rockchip,rk3399-i2cuF FZ  i2cpclk$default=+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ` baudclkapb_pclkcJTdefault >?@okaybluetoothbrcm,bcm43438-btA  ext_clock aB u% % default CDEserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRa baudclkapb_pclkbJTdefaultF disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSb baudclkapb_pclkdJTdefaultGokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTc baudclkapb_pclkeJTdefaultH disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[ spiclkapb_pclkDI I txrxdefaultJKLM+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\ spiclkapb_pclk5I I txrxdefaultNOPQ+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI] spiclkapb_pclk4IItxrxdefaultRSTU+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^ spiclkapb_pclkCIItxrxdefaultVWXY+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_ spiclkapb_pclkZZ txrxdefault[\]^O+ disabledthermal-zonescpud_tripscpu_alert0ppassive0`cpu_alert1$passive0acpu_crits criticalcooling-mapsmap0`map1aHgpud_tripsgpu_alert0$passive0bgpu_crits criticalcooling-mapsmap0b ctsadc@ff260000rockchip,rk3399-tsadc&auO qOd tsadcapb_pclk tsadc-apb]sinitdefaultsleepde%d/okayE\0_qos@ffa58000syscon 0mqos@ffa5c000syscon 0nqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon 0qqos@ffa70080syscon 0rqos@ffa74000syscon@ 0oqos@ffa76000syscon` 0pqos@ffa90000syscon 0sqos@ffa98000syscon 0fqos@ffaa0000syscon 0tqos@ffaa0080syscon 0uqos@ffaa8000syscon 0vqos@ffaa8080syscon 0wqos@ffab0000syscon 0gqos@ffab0080syscon 0hqos@ffab8000syscon 0iqos@ffac0000syscon 0jqos@ffac0080syscon 0kqos@ffac8000syscon 0xqos@ffac8080syscon 0yqos@ffad0000syscon 0zqos@ffad8080syscon qos@ffae0000syscon 0lpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controllerw+0pd_iep@34"fpd_rga@33!ghpd_vcodec@31ipd_vdu@32 jkpd_gpu@35#lpd_edp@25lpd_emmc@23mpd_gmac@22fnpd_sd@27Lopd_sdioaudio@28ppd_tcpc0@8~}pd_tcpc1@9 pd_usb3@24qrpd_vio@15+pd_hdcp@21rspd_isp0@19tupd_isp1@20vwpd_vo@16+pd_vopb@17xypd_vopl@18zsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd20io-domains&rockchip,rk3399-pmu-io-voltage-domainokay{spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5|| spiclkapb_pclk<default}~+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7||" baudclkapb_pclkfJTdefault disabledi2c@ff3c0000rockchip,rk3399-i2c<u|  | |  i2cpclk9default+okay2pmic@1brockchip,rk808 xin32krk808-clkout2default $0=JW0AregulatorsDCDC_REG1 dvdd_centers qpqregulator-state-memDCDC_REG2 dvdd_cpu_ls qpq0 regulator-state-memDCDC_REG3dvcc_ddrsregulator-state-memDCDC_REG4dvcc_1v8sw@w@0regulator-state-mem w@LDO_REG1 dvcc1v8_codecsw@w@regulator-state-memLDO_REG2 dvcc1v8_hdmisw@w@regulator-state-memLDO_REG3 dvcca_1v8sw@w@regulator-state-mem w@LDO_REG4 dvcc_sdios--0regulator-state-mem -LDO_REG5dvcca3v0_codecs--regulator-state-memLDO_REG6dvcc_1v5s``regulator-state-mem `LDO_REG7 dvcc0v9_hdmis  regulator-state-memLDO_REG8dvcc_3v0s--0{regulator-state-mem -SWITCH_REG1dvcc_cams2Z2Zregulator-state-memSWITCH_REG2 dvcc_mipis2Z2Zregulator-state-memregulator@40silergy,syr827@ +default dvdd_cpu_b 4`s H0regulator-state-memregulator@41silergy,syr828A +defaultdvdd_gpu 4`s H0regulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=u|  | |  i2cpclk8default+okayX2i2c@ff3e0000rockchip,rk3399-i2c>u|  | |  i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB Sdefault| pwm disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB Sdefault| pwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  Sdefault| pwmokay0pwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 Sdefault| pwm disabledvideo-codec@ff650000rockchip,rk3399-vpue rq ]vepuvdpu  aclkhclk ^Oiommu@ff650800rockchip,iommue@s]vpu_mmu  aclkiface eO0video-codec@ff660000rockchip,rk3399-vdecft]vdpu  axiahbcabaccore ^O iommu@ff660480rockchip,iommu f@f@u ]vdec_mmu  aclkifaceO  e0iommu@ff670800rockchip,iommug@*]iep_mmu  aclkiface e disabledrga@ff680000rockchip,rk3399-rgah7m aclkhclksclkjgi coreaxiahbO!efuse@ff690000rockchip,rk3399-efusei+}  pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruu] ru|(J0|clock-controller@ff760000rockchip,rk3399-cruv] ru@BCx@#g/;рxh<4`#Fׄׄ 0syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+0io-domains"rockchip,rk3399-io-voltage-domainokay { {  {mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wo dphy-refdphy-cfggrfO  disabledusb2-phy@e450rockchip,rk3399-usb2phyP{ phyclkclk_usbphy0_480mokay0,host-port  ]linestateokay0-otg-port 0ghj]otg-bvalidotg-idlinestateokay00usb2-phy@e460rockchip,rk3399-usb2phy`| phyclkclk_usbphy1_480mokay0.host-port  ]linestateokay0/otg-port 0lmo]otg-bvalidotg-idlinestateokay02phy@f780rockchip,rk3399-emmc-phy$ emmcclk okay0+pcie-phyrockchip,rk3399-pcie-phy refclk  2phyokay0phy@ff7c0000rockchip,rk3399-typec-phy|~} tcpdcoretcpdphy-refu~OLuphyuphy-pipeuphy-tcphy]okaydp-port 04usb3-port 01phy@ff800000rockchip,rk3399-typec-phy tcpdcoretcpdphy-refuO Muphyuphy-pipeuphy-tcphy]okaydp-port 05usb3-port 03watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ  pclktimerspdif@ff870000rockchip,rk3399-spdifBZtx  mclkhclkUdefaultO disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s]'ZZtxrx i2s_clki2s_hclkVdefaultOokay  i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(ZZtxrx i2s_clki2s_hclkWdefaultOokay  i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)ZZtxrx i2s_clki2s_hclkXOokay0vop@ff8f0000rockchip,rk3399-vop-lit>wuׄ aclk_vopdclk_vophclk_vop ^O axiahbdclkokayport+0endpoint@00endpoint@10endpoint@20endpoint@30endpoint@407iommu@ff8f3f00rockchip,iommu?w ]vopl_mmu  aclkifaceO eokay0vop@ff900000rockchip,rk3399-vop-big>vuׄ aclk_vopdclk_vophclk_vop ^O axiahbdclkokayport+0endpoint@00endpoint@10endpoint@20endpoint@30endpoint@406iommu@ff903f00rockchip,iommu?v ]vopb_mmu  aclkifaceO eokay0iommu@ff914000rockchip,iommu @P+ ]isp0_mmu  aclkiface eO iommu@ff924000rockchip,iommu @P, ]isp1_mmu  aclkiface eO hdmi-soundsimple-audio-card %i2s > Xhdmi-soundokaysimple-audio-card,cpu osimple-audio-card,codec ohdmi@ff940000rockchip,rk3399-dw-hdmi(tqop iahbisfrvpllgrfcecOT]okay ydefault0portsport+endpoint@00endpoint@10mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- po refpclkphy_cfggrfOapb]+ disabledports+port@0+endpoint@00endpoint@10mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qo refpclkphy_cfggrfOapb]+ disabledports+port@0+endpoint@00endpoint@10edp@ff970000rockchip,rk3399-edp jlo  dppclkgrfdefaultOdp] disabledports+port@0+endpoint@00endpoint@10gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 ]jobmmugpuO#okay 0cpinctrlrockchip,rk3399-pinctrl] +gpio0@ff720000rockchip,gpio-bankr|  :60%gpio1@ff730000rockchip,gpio-banks|  :60gpio2@ff780000rockchip,gpio-bankxP  :60Bgpio3@ff788000rockchip,gpio-bankxQ  :60 gpio4@ff790000rockchip,gpio-bankyR  :60pcfg-pull-up 0pcfg-pull-down 0pcfg-pull-none 0pcfg-pull-none-12ma  0pcfg-pull-none-13ma  0pcfg-pull-none-18ma  pcfg-pull-none-20ma  0pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  0pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low clockclk-32k edpedp-hpd 0gmacrgmii-pins     0rmii-pins      i2c0i2c0-xfer 0i2c1i2c1-xfer 08i2c2i2c2-xfer 09i2c3i2c3-xfer 0:i2c4i2c4-xfer   0i2c5i2c5-xfer   0;i2c6i2c6-xfer   0<i2c7i2c7-xfer 0=i2c8i2c8-xfer 0i2s0i2s0-2ch-bus` i2s0-8ch-bus 0i2s1i2s1-2ch-busP 0sdio0sdio0-bus1 sdio0-bus4@ 0"sdio0-cmd 0#sdio0-clk 0$sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    0*sdmmc-clk  0'sdmmc-cmd  0)sdmmc-cd 0(sdmmc-wp sleepap-pwroff ddrio-pwroff spdifspdif-bus 0spdif-bus-1 spi0spi0-clk 0Jspi0-cs0 0Mspi0-cs1 spi0-tx 0Kspi0-rx 0Lspi1spi1-clk  0Nspi1-cs0  0Qspi1-rx 0Pspi1-tx 0Ospi2spi2-clk  0Rspi2-cs0  0Uspi2-rx  0Tspi2-tx  0Sspi3spi3-clk 0}spi3-cs0 0spi3-rx 0spi3-tx 0~spi4spi4-clk 0Vspi4-cs0 0Yspi4-rx 0Xspi4-tx 0Wspi5spi5-clk 0[spi5-cs0 0^spi5-rx 0]spi5-tx 0\testclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-pin 0dotp-out 0euart0uart0-xfer 0>uart0-cts 0?uart0-rts 0@uart1uart1-xfer   0Fuart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer 0Guart3uart3-xfer 0Huart3-cts uart3-rts uart4uart4-xfer 0uarthdcpuarthdcp-xfer pwm0pwm0-pin 0pwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin 0pwm1-pin-pull-down pwm2pwm2-pin 0pwm2-pin-pull-down pwm3apwm3a-pin 0pwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec 0pciepci-clkreqn-cpm pci-clkreqnb-cpm 0pcie-pwr-en 0btbt-enable-h 0Ebt-host-wake-l 0Cbt-wake-l 0Dpmicpmic-int-l 0vsel1-pin 0vsel2-pin 0usb-typecvcc5v0-typec-en 0usb2vcc5v0-host-en 0wifiwifi-enable-h 0wifi-host-wake-l 0&opp-table0operating-points-v2 0 opp00 "Q ) 5 7@opp01 "#F ) 5opp02 "0, ) Popp03 "< )Hopp04 "G )B@opp05 "Tfr )*opp-table1operating-points-v2 0 opp00 "Q ) 5 7@opp01 "#F ) 5opp02 "0, ) opp03 "< ) Yopp04 "G )~opp05 "Tfr )opp06 "_" )opp07 "kI )Oopp-table2operating-points-v20opp00 "  ) 5opp01 "@ ) 5opp02 "ׄ ) opp03 "e ) Yopp04 "#F )Hopp05 "/ )chosen Hserial2:1500000n8external-gmac-clock fixed-clocksY@ clkin_gmac0sdio-pwrseqmmc-pwrseq-simpleA  ext_clockdefault T% 0!dc-12vregulator-fixed dvcc12v_dcins0vcc-sysregulator-fixed dvcc5v0_syssLK@LK@ H0vcc-0v9regulator-fixeddvcc_0v9s   H0vcc3v3-pcie-regulatorregulator-fixed ` Bdefault dvcc3v3_pcies H0vcc3v3-sysregulator-fixed dvcc3v3_syss2Z2Z H0vcc5v0-host-regulatorregulator-fixed ` default dvcc5v0_hosts H0vcc5v0-typec-regulatorregulator-fixed ` default dvcc5v0_typecs Hvcc3v3-phy-regulatorregulator-fixeddvcc_lans2Z2Z0regulator-state-memvdd-logpwm-regulator sadvdd_logs 5\ H compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsarm,pl330-periph-burstclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-0pinctrl-namesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathreset-gpiosenable-active-highpwms